1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-26 04:32:44 +01:00
llvm-mirror/test/CodeGen/AArch64/macro-fusion.ll
QingShan Zhang 3d884e29fd [MacroFusion] Limit the max fused number as 2 to reduce the dependency
This is the example:

int foo(int a, int b, int c, int d) {
  return a + b + c + d;
}

And this is the Dependency Graph:
+------+       +------+       +------+       +------+
|  A   |       |  B   |       |  C   |       |  D   |
+--+--++       +---+--+       +--+---+       +--+---+
   ^  ^            ^  ^          ^              ^
   |  |            |  |          |              |
   |  |            |  |New1      +--------------+
   |  |            |  |          |
   |  |            |  |       +--+---+
   |  |New2        |  +-------+ ADD1 |
   |  |            |          +--+---+
   |  |            |    Fuse     ^
   |  |            +-------------+
   |  +------------+
   |               |
   |   Fuse     +--+---+
   +----------->+ ADD2 |
   |            +------+
+--+---+
| ADD3 |
+------+

We need also create an artificial edge from ADD1 to A if
https://reviews.llvm.org/D69998 is landed. That will force the Node A scheduled
before the ADD1 and ADD2. But in fact, it is ok to schedule the Node A
in-between ADD3 and ADD2, as ADD3 and ADD2 are NOT a fusion pair because
ADD2 has been matched to ADD1. We are creating these unnecessary dependency
edges that override the heuristics.

Differential Revision: https://reviews.llvm.org/D70066
2019-12-04 05:05:35 +00:00

21 lines
857 B
LLVM

; REQUIRES: asserts
; RUN: llc < %s -mtriple=aarch64-linux-gnu -mattr=+fuse-arith-logic -verify-misched -debug-only=machine-scheduler 2>&1 > /dev/null | FileCheck %s
; Verify that, the macro-fusion creates the necessary dependencies between SUs and
; only 2 SU's are fused at most.
define signext i32 @test(i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d) {
entry:
; CHECK: ********** MI Scheduling **********
; CHECK-LABEL: %bb.0 entry
; CHECK: Macro fuse: SU([[SU4:[0-9]+]]) - SU([[SU5:[0-9]+]])
; CHECK: Bind SU([[SU1:[0-9]+]]) - SU([[SU4]])
; CHECK-NOT: Macro fuse:
; CHECK: SU([[SU1]]): %{{[0-9]+}}:gpr32 = COPY $w2
; CHECK: SU([[SU4]]): %{{[0-9]+}}:gpr32 = nsw ADDWrr
; CHECK: SU([[SU5]]): %{{[0-9]+}}:gpr32 = nsw ADDWrr
%add = add nsw i32 %b, %a
%add1 = add nsw i32 %add, %c
%sub = sub nsw i32 %add1, %d
ret i32 %sub
}