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eb198d6426
This adds some extra codegen tests for abs and hadd, regenerating some of the existing tests with updated check lines.
110 lines
2.7 KiB
LLVM
110 lines
2.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs \
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; RUN: -mtriple=aarch64-unknown-unknown < %s | FileCheck %s
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declare i64 @llvm.abs.i64(i64, i1 immarg)
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define i64 @neg_abs64(i64 %x) {
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; CHECK-LABEL: neg_abs64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmp x0, #0 // =0
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; CHECK-NEXT: cneg x8, x0, mi
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; CHECK-NEXT: neg x0, x8
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; CHECK-NEXT: ret
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%abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)
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%neg = sub nsw i64 0, %abs
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ret i64 %neg
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}
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declare i32 @llvm.abs.i32(i32, i1 immarg)
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define i32 @neg_abs32(i32 %x) {
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; CHECK-LABEL: neg_abs32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmp w0, #0 // =0
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; CHECK-NEXT: cneg w8, w0, mi
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; CHECK-NEXT: neg w0, w8
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; CHECK-NEXT: ret
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%abs = tail call i32 @llvm.abs.i32(i32 %x, i1 true)
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%neg = sub nsw i32 0, %abs
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ret i32 %neg
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}
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declare i16 @llvm.abs.i16(i16, i1 immarg)
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define i16 @neg_abs16(i16 %x) {
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; CHECK-LABEL: neg_abs16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sbfx w8, w0, #15, #1
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; CHECK-NEXT: eor w9, w0, w8
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; CHECK-NEXT: sub w0, w8, w9
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; CHECK-NEXT: ret
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%abs = tail call i16 @llvm.abs.i16(i16 %x, i1 true)
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%neg = sub nsw i16 0, %abs
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ret i16 %neg
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}
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declare i128 @llvm.abs.i128(i128, i1 immarg)
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define i128 @neg_abs128(i128 %x) {
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; CHECK-LABEL: neg_abs128:
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; CHECK: // %bb.0:
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; CHECK-NEXT: asr x8, x1, #63
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; CHECK-NEXT: eor x10, x0, x8
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; CHECK-NEXT: eor x9, x1, x8
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; CHECK-NEXT: subs x0, x8, x10
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; CHECK-NEXT: sbcs x1, x8, x9
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; CHECK-NEXT: ret
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%abs = tail call i128 @llvm.abs.i128(i128 %x, i1 true)
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%neg = sub nsw i128 0, %abs
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ret i128 %neg
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}
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define i64 @abs64(i64 %x) {
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; CHECK-LABEL: abs64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmp x0, #0 // =0
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; CHECK-NEXT: cneg x0, x0, mi
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; CHECK-NEXT: ret
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%abs = tail call i64 @llvm.abs.i64(i64 %x, i1 true)
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ret i64 %abs
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}
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define i32 @abs32(i32 %x) {
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; CHECK-LABEL: abs32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: cmp w0, #0 // =0
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; CHECK-NEXT: cneg w0, w0, mi
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; CHECK-NEXT: ret
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%abs = tail call i32 @llvm.abs.i32(i32 %x, i1 true)
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ret i32 %abs
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}
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define i16 @abs16(i16 %x) {
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; CHECK-LABEL: abs16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: sxth w8, w0
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; CHECK-NEXT: cmp w8, #0 // =0
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; CHECK-NEXT: cneg w0, w8, mi
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; CHECK-NEXT: ret
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%abs = tail call i16 @llvm.abs.i16(i16 %x, i1 true)
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ret i16 %abs
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}
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define i128 @abs128(i128 %x) {
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; CHECK-LABEL: abs128:
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; CHECK: // %bb.0:
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; CHECK-NEXT: negs x8, x0
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; CHECK-NEXT: ngcs x9, x1
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; CHECK-NEXT: cmp x1, #0 // =0
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; CHECK-NEXT: csel x0, x8, x0, lt
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; CHECK-NEXT: csel x1, x9, x1, lt
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; CHECK-NEXT: ret
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%abs = tail call i128 @llvm.abs.i128(i128 %x, i1 true)
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ret i128 %abs
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}
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