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c1d491f5a6
This allows these optimisations to apply to e.g. `urem i16` directly
before `urem` is promoted to i32 on architectures where i16 operations
are not intrinsically legal (such as on Aarch64). The legalization then
later can happen more directly and generated code gets a chance to avoid
wasting time on computing results in types wider than necessary, in the end.
Seems like mostly an improvement in terms of results at least as far as x86_64 and aarch64 are concerned, with a few regressions here and there. It also helps in preventing regressions in changes like {D87976}.
Reviewed By: lebedev.ri
Differential Revision: https://reviews.llvm.org/D88785
254 lines
7.4 KiB
LLVM
254 lines
7.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-unknown-linux-gnu < %s | FileCheck %s
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;------------------------------------------------------------------------------;
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; Odd divisors
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;------------------------------------------------------------------------------;
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define i32 @test_urem_odd(i32 %X) nounwind {
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; CHECK-LABEL: test_urem_odd:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #52429
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; CHECK-NEXT: movk w8, #52428, lsl #16
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; CHECK-NEXT: mov w9, #13108
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; CHECK-NEXT: mul w8, w0, w8
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; CHECK-NEXT: movk w9, #13107, lsl #16
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; CHECK-NEXT: cmp w8, w9
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: ret
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%urem = urem i32 %X, 5
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%cmp = icmp eq i32 %urem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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define i32 @test_urem_odd_25(i32 %X) nounwind {
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; CHECK-LABEL: test_urem_odd_25:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #23593
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; CHECK-NEXT: movk w8, #49807, lsl #16
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; CHECK-NEXT: mov w9, #28836
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; CHECK-NEXT: mul w8, w0, w8
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; CHECK-NEXT: movk w9, #2621, lsl #16
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; CHECK-NEXT: cmp w8, w9
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: ret
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%urem = urem i32 %X, 25
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%cmp = icmp eq i32 %urem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; This is like test_urem_odd, except the divisor has bit 30 set.
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define i32 @test_urem_odd_bit30(i32 %X) nounwind {
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; CHECK-LABEL: test_urem_odd_bit30:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #43691
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; CHECK-NEXT: movk w8, #27306, lsl #16
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; CHECK-NEXT: mul w8, w0, w8
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; CHECK-NEXT: cmp w8, #4 // =4
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: ret
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%urem = urem i32 %X, 1073741827
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%cmp = icmp eq i32 %urem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; This is like test_urem_odd, except the divisor has bit 31 set.
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define i32 @test_urem_odd_bit31(i32 %X) nounwind {
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; CHECK-LABEL: test_urem_odd_bit31:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #43691
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; CHECK-NEXT: movk w8, #10922, lsl #16
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; CHECK-NEXT: mul w8, w0, w8
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; CHECK-NEXT: cmp w8, #2 // =2
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: ret
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%urem = urem i32 %X, 2147483651
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%cmp = icmp eq i32 %urem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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;------------------------------------------------------------------------------;
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; Even divisors
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;------------------------------------------------------------------------------;
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define i16 @test_urem_even(i16 %X) nounwind {
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; CHECK-LABEL: test_urem_even:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #28087
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; CHECK-NEXT: mul w8, w0, w8
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; CHECK-NEXT: and w9, w8, #0xfffc
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; CHECK-NEXT: lsr w9, w9, #1
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; CHECK-NEXT: bfi w9, w8, #15, #17
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; CHECK-NEXT: ubfx w8, w9, #1, #15
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; CHECK-NEXT: cmp w8, #2340 // =2340
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; CHECK-NEXT: cset w0, hi
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; CHECK-NEXT: ret
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%urem = urem i16 %X, 14
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%cmp = icmp ne i16 %urem, 0
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%ret = zext i1 %cmp to i16
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ret i16 %ret
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}
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define i32 @test_urem_even_100(i32 %X) nounwind {
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; CHECK-LABEL: test_urem_even_100:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #23593
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; CHECK-NEXT: movk w8, #49807, lsl #16
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; CHECK-NEXT: mul w8, w0, w8
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; CHECK-NEXT: mov w9, #23593
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; CHECK-NEXT: ror w8, w8, #2
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; CHECK-NEXT: movk w9, #655, lsl #16
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; CHECK-NEXT: cmp w8, w9
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: ret
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%urem = urem i32 %X, 100
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%cmp = icmp eq i32 %urem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; This is like test_urem_even, except the divisor has bit 30 set.
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define i32 @test_urem_even_bit30(i32 %X) nounwind {
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; CHECK-LABEL: test_urem_even_bit30:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #20165
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; CHECK-NEXT: movk w8, #64748, lsl #16
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; CHECK-NEXT: mul w8, w0, w8
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; CHECK-NEXT: ror w8, w8, #3
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; CHECK-NEXT: cmp w8, #4 // =4
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: ret
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%urem = urem i32 %X, 1073741928
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%cmp = icmp eq i32 %urem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; This is like test_urem_odd, except the divisor has bit 31 set.
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define i32 @test_urem_even_bit31(i32 %X) nounwind {
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; CHECK-LABEL: test_urem_even_bit31:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #64251
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; CHECK-NEXT: movk w8, #47866, lsl #16
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; CHECK-NEXT: mul w8, w0, w8
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; CHECK-NEXT: ror w8, w8, #1
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; CHECK-NEXT: cmp w8, #2 // =2
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: ret
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%urem = urem i32 %X, 2147483750
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%cmp = icmp eq i32 %urem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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;------------------------------------------------------------------------------;
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; Special case
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;------------------------------------------------------------------------------;
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; 'NE' predicate is fine too.
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define i32 @test_urem_odd_setne(i32 %X) nounwind {
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; CHECK-LABEL: test_urem_odd_setne:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #52429
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; CHECK-NEXT: movk w8, #52428, lsl #16
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; CHECK-NEXT: mul w8, w0, w8
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; CHECK-NEXT: mov w9, #858993459
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; CHECK-NEXT: cmp w8, w9
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; CHECK-NEXT: cset w0, hi
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; CHECK-NEXT: ret
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%urem = urem i32 %X, 5
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%cmp = icmp ne i32 %urem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; The fold is only valid for positive divisors, negative-ones should be negated.
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define i32 @test_urem_negative_odd(i32 %X) nounwind {
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; CHECK-LABEL: test_urem_negative_odd:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #858993459
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; CHECK-NEXT: mul w8, w0, w8
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; CHECK-NEXT: cmp w8, #1 // =1
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; CHECK-NEXT: cset w0, hi
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; CHECK-NEXT: ret
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%urem = urem i32 %X, -5
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%cmp = icmp ne i32 %urem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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define i32 @test_urem_negative_even(i32 %X) nounwind {
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; CHECK-LABEL: test_urem_negative_even:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #37449
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; CHECK-NEXT: movk w8, #51492, lsl #16
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; CHECK-NEXT: mul w8, w0, w8
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; CHECK-NEXT: ror w8, w8, #1
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; CHECK-NEXT: cmp w8, #1 // =1
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; CHECK-NEXT: cset w0, hi
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; CHECK-NEXT: ret
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%urem = urem i32 %X, -14
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%cmp = icmp ne i32 %urem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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;------------------------------------------------------------------------------;
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; Negative tests
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;------------------------------------------------------------------------------;
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; We can lower remainder of division by one much better elsewhere.
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define i32 @test_urem_one(i32 %X) nounwind {
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; CHECK-LABEL: test_urem_one:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w0, #1
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; CHECK-NEXT: ret
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%urem = urem i32 %X, 1
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%cmp = icmp eq i32 %urem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; We can lower remainder of division by powers of two much better elsewhere.
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define i32 @test_urem_pow2(i32 %X) nounwind {
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; CHECK-LABEL: test_urem_pow2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: tst w0, #0xf
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%urem = urem i32 %X, 16
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%cmp = icmp eq i32 %urem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; The fold is only valid for positive divisors, and we can't negate INT_MIN.
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define i32 @test_urem_int_min(i32 %X) nounwind {
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; CHECK-LABEL: test_urem_int_min:
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; CHECK: // %bb.0:
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; CHECK-NEXT: tst w0, #0x7fffffff
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: ret
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%urem = urem i32 %X, 2147483648
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%cmp = icmp eq i32 %urem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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; We can lower remainder of division by all-ones much better elsewhere.
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define i32 @test_urem_allones(i32 %X) nounwind {
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; CHECK-LABEL: test_urem_allones:
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; CHECK: // %bb.0:
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; CHECK-NEXT: neg w8, w0
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; CHECK-NEXT: cmp w8, #2 // =2
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; CHECK-NEXT: cset w0, lo
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; CHECK-NEXT: ret
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%urem = urem i32 %X, 4294967295
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%cmp = icmp eq i32 %urem, 0
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%ret = zext i1 %cmp to i32
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ret i32 %ret
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}
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