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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 19:12:56 +02:00
llvm-mirror/lib/Target/WebAssembly
Matthias Braun 8623ebcaee RegisterScavenger: Take a reference as enterBasicBlock() argument.
Make it obvious that the argument cannot be nullptr.
Remove an unnecessary nullptr check in initRegState.

llvm-svn: 265511
2016-04-06 02:47:09 +00:00
..
Disassembler [WebAssembly] Implement support for custom NaN bit patterns. 2016-02-16 15:14:23 +00:00
InstPrinter [WebAssembly] Implement support for custom NaN bit patterns. 2016-02-16 15:14:23 +00:00
MCTargetDesc [WebAssembly] Disable register stackification and coloring when not optimizing 2016-02-17 23:20:43 +00:00
TargetInfo
CMakeLists.txt [WebAssembly] Implement irreducible control flow. 2016-03-09 02:01:14 +00:00
known_gcc_test_failures.txt [WebAssembly] Update known gcc test failures 2016-03-09 22:14:33 +00:00
LLVMBuild.txt
README.txt [WebAssembly] Update comments about irreducible control flow. 2016-03-09 04:17:36 +00:00
WebAssembly.h [WebAssembly] Implement irreducible control flow. 2016-03-09 02:01:14 +00:00
WebAssembly.td
WebAssemblyArgumentMove.cpp
WebAssemblyAsmPrinter.cpp
WebAssemblyCFGStackify.cpp [WebAssembly] Implement irreducible control flow. 2016-03-09 02:01:14 +00:00
WebAssemblyFastISel.cpp
WebAssemblyFixIrreducibleControlFlow.cpp [WebAssembly] Add final keywords to a few more subclasses, for consistency. 2016-03-11 19:45:37 +00:00
WebAssemblyFrameLowering.cpp Change eliminateCallFramePseudoInstr() to return an iterator 2016-03-31 18:33:38 +00:00
WebAssemblyFrameLowering.h Change eliminateCallFramePseudoInstr() to return an iterator 2016-03-31 18:33:38 +00:00
WebAssemblyInstrAtomics.td
WebAssemblyInstrCall.td
WebAssemblyInstrControl.td [WebAssembly] Update for spec change from tableswitch to br_table. 2016-03-08 03:18:12 +00:00
WebAssemblyInstrConv.td
WebAssemblyInstrFloat.td [WebAssembly] Update the select instructions' operand orders to match the spec. 2016-02-05 17:14:59 +00:00
WebAssemblyInstrFormats.td
WebAssemblyInstrInfo.cpp [WebAssembly] Update the br_if instructions' operand orders to match the spec. 2016-02-08 21:50:13 +00:00
WebAssemblyInstrInfo.h [WebAssembly] Enhanced register stackification 2016-01-28 01:22:44 +00:00
WebAssemblyInstrInfo.td [WebAssembly] Update for spec change from tableswitch to br_table. 2016-03-08 03:18:12 +00:00
WebAssemblyInstrInteger.td [WebAssembly] Implement the rotate instructions. 2016-03-22 18:01:49 +00:00
WebAssemblyInstrMemory.td [WebAssembly] Teach address folding to fold bitwise-or nodes. 2016-02-22 20:04:02 +00:00
WebAssemblyInstrSIMD.td
WebAssemblyISD.def [WebAssembly] Update for spec change from tableswitch to br_table. 2016-03-08 03:18:12 +00:00
WebAssemblyISelDAGToDAG.cpp
WebAssemblyISelLowering.cpp [WebAssembly] Implement the rotate instructions. 2016-03-22 18:01:49 +00:00
WebAssemblyISelLowering.h [WebAssembly] Implement __builtin_frame_address. 2016-02-16 23:48:04 +00:00
WebAssemblyLowerBrUnless.cpp [WebAssembly] Update the br_if instructions' operand orders to match the spec. 2016-02-08 21:50:13 +00:00
WebAssemblyMachineFunctionInfo.cpp
WebAssemblyMachineFunctionInfo.h [WebAssembly] Switch varags calling convention to use a register 2016-02-10 19:51:04 +00:00
WebAssemblyMCInstLower.cpp
WebAssemblyMCInstLower.h
WebAssemblyOptimizeReturned.cpp
WebAssemblyPeephole.cpp [WebAssembly] Support physical registers in the rewrite-to-discard optimization. 2016-02-21 03:27:22 +00:00
WebAssemblyPEI.cpp RegisterScavenger: Take a reference as enterBasicBlock() argument. 2016-04-06 02:47:09 +00:00
WebAssemblyRegColoring.cpp WebAssembly: fix build 2016-02-28 15:33:53 +00:00
WebAssemblyRegisterInfo.cpp [WebAssembly] Stackify code emitted by eliminateFrameIndex and SP writeback 2016-03-17 17:00:29 +00:00
WebAssemblyRegisterInfo.h
WebAssemblyRegisterInfo.td
WebAssemblyRegNumbering.cpp [WebAssembly] Implement __builtin_frame_address. 2016-02-16 23:48:04 +00:00
WebAssemblyRegStackify.cpp Try to fix build of WebAssemblyRegStackify.cpp on Windows 2016-03-14 11:04:15 +00:00
WebAssemblySelectionDAGInfo.cpp
WebAssemblySelectionDAGInfo.h
WebAssemblySetP2AlignOperands.cpp
WebAssemblyStoreResults.cpp WebAssembly NFC: simplify control flow 2016-02-01 10:46:16 +00:00
WebAssemblySubtarget.cpp
WebAssemblySubtarget.h
WebAssemblyTargetMachine.cpp [WebAssembly] Remove duplicate disabling of passes 2016-03-28 22:52:20 +00:00
WebAssemblyTargetMachine.h
WebAssemblyTargetObjectFile.cpp
WebAssemblyTargetObjectFile.h
WebAssemblyTargetTransformInfo.cpp
WebAssemblyTargetTransformInfo.h

//===-- README.txt - Notes for WebAssembly code gen -----------------------===//

This WebAssembly backend is presently in a very early stage of development.
The code should build and not break anything else, but don't expect a lot more
at this point.

For more information on WebAssembly itself, see the design documents:
  * https://github.com/WebAssembly/design/blob/master/README.md

The following documents contain some information on the planned semantics and
binary encoding of WebAssembly itself:
  * https://github.com/WebAssembly/design/blob/master/AstSemantics.md
  * https://github.com/WebAssembly/design/blob/master/BinaryEncoding.md

The backend is built, tested and archived on the following waterfall:
  https://wasm-stat.us

The backend's bringup is done using the GCC torture test suite first since it
doesn't require C library support. Current known failures are in
known_gcc_test_failures.txt, all other tests should pass. The waterfall will
turn red if not. Once most of these pass, further testing will use LLVM's own
test suite. The tests can be run locally using:
  https://github.com/WebAssembly/waterfall/blob/master/src/compile_torture_tests.py

//===---------------------------------------------------------------------===//

Br, br_if, and br_table instructions can support having a value on the
expression stack across the jump (sometimes). We should (a) model this, and
(b) extend the stackifier to utilize it.

//===---------------------------------------------------------------------===//

The min/max operators aren't exactly a<b?a:b because of NaN and negative zero
behavior. The ARM target has the same kind of min/max instructions and has
implemented optimizations for them; we should do similar optimizations for
WebAssembly.

//===---------------------------------------------------------------------===//

AArch64 runs SeparateConstOffsetFromGEPPass, followed by EarlyCSE and LICM.
Would these be useful to run for WebAssembly too? Also, it has an option to
run SimplifyCFG after running the AtomicExpand pass. Would this be useful for
us too?

//===---------------------------------------------------------------------===//

Register stackification uses the EXPR_STACK physical register to impose
ordering dependencies on instructions with stack operands. This is pessimistic;
we should consider alternate ways to model stack dependencies.

//===---------------------------------------------------------------------===//

Lots of things could be done in WebAssemblyTargetTransformInfo.cpp. Similarly,
there are numerous optimization-related hooks that can be overridden in
WebAssemblyTargetLowering.

//===---------------------------------------------------------------------===//

Instead of the OptimizeReturned pass, which should consider preserving the
"returned" attribute through to MachineInstrs and extending the StoreResults
pass to do this optimization on calls too. That would also let the
WebAssemblyPeephole pass clean up dead defs for such calls, as it does for
stores.

//===---------------------------------------------------------------------===//

Consider implementing optimizeSelect, optimizeCompareInstr, optimizeCondBranch,
optimizeLoadInstr, and/or getMachineCombinerPatterns.

//===---------------------------------------------------------------------===//

Find a clean way to fix the problem which leads to the Shrink Wrapping pass
being run after the WebAssembly PEI pass.

//===---------------------------------------------------------------------===//

When setting multiple local variables to the same constant, we currently get
code like this:

    i32.const   $4=, 0
    i32.const   $3=, 0

It could be done with a smaller encoding like this:

    i32.const   $push5=, 0
    tee_local   $push6=, $4=, $pop5
    copy_local  $3=, $pop6

//===---------------------------------------------------------------------===//

WebAssembly registers are implicitly initialized to zero. Explicit zeroing is
therefore often redundant and could be optimized away.

//===---------------------------------------------------------------------===//

Small indices may use smaller encodings than large indices.
WebAssemblyRegColoring and/or WebAssemblyRegRenumbering should sort registers
according to their usage frequency to maximize the usage of smaller encodings.

//===---------------------------------------------------------------------===//

When the last statement in a function body computes the return value, it can
just let that value be the exit value of the outermost block, rather than
needing an explicit return operation.

//===---------------------------------------------------------------------===//

Many cases of irreducible control flow could be transformed more optimally
than via the transform in WebAssemblyFixIrreducibleControlFlow.cpp.

It may also be worthwhile to do transforms before register coloring,
particularly when duplicating code, to allow register coloring to be aware of
the duplication.

//===---------------------------------------------------------------------===//