mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-21 20:12:56 +02:00
7d010d19df
This patch corresponds to review: http://reviews.llvm.org/D17711 It disables direct moves on these operations in 32-bit mode since the patterns assume 64-bit registers. The final patch is slightly different from the Phabricator review as the bitcast operations needed to be disabled in 32-bit mode as well. This fixes PR26617. llvm-svn: 264282
16 lines
357 B
LLVM
16 lines
357 B
LLVM
; RUN: llc -mcpu=pwr8 -mtriple=powerpc-unknown-unknown < %s | FileCheck %s
|
|
define i32 @test(<4 x i32> %v, i32 %elem) #0 {
|
|
entry:
|
|
%vecext = extractelement <4 x i32> %v, i32 %elem
|
|
ret i32 %vecext
|
|
}
|
|
; CHECK: stxvw4x 34,
|
|
; CHECK: lwzx 3,
|
|
|
|
define float @test2(i32 signext %a) {
|
|
entry:
|
|
%conv = bitcast i32 %a to float
|
|
ret float %conv
|
|
}
|
|
; CHECK-NOT: mtvsr
|