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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-23 21:13:02 +02:00
llvm-mirror/test/CodeGen/PowerPC
Tony Jiang 7cd663b80c [PowerPC] Expand ISEL instruction into if-then-else sequence.
Generally, the ISEL is expanded into if-then-else sequence, in some
cases (like when the destination register is the same with the true
or false value register), it may just be expanded into just the if
or else sequence.

llvm-svn: 292154
2017-01-16 20:12:26 +00:00
..
2004-11-29-ShrCrash.ll
2004-11-30-shift-crash.ll
2004-11-30-shr-var-crash.ll
2004-12-12-ZeroSizeCommon.ll
2005-01-14-SetSelectCrash.ll
2005-01-14-UndefLong.ll
2005-08-12-rlwimi-crash.ll
2005-09-02-LegalizeDuplicatesCalls.ll
2005-10-08-ArithmeticRotate.ll
2005-11-30-vastart-crash.ll
2006-01-11-darwin-fp-argument.ll
2006-01-20-ShiftPartsCrash.ll
2006-04-01-FloatDoubleExtend.ll
2006-04-05-splat-ish.ll
2006-04-19-vmaddfp-crash.ll
2006-05-12-rlwimi-crash.ll
2006-07-07-ComputeMaskedBits.ll
2006-07-19-stwbrx-crash.ll
2006-08-11-RetVector.ll
2006-08-15-SelectionCrash.ll
2006-09-28-shift_64.ll
2006-10-13-Miscompile.ll
2006-10-17-brcc-miscompile.ll
2006-10-17-ppc64-alloca.ll
2006-11-10-DAGCombineMiscompile.ll
2006-11-29-AltivecFPSplat.ll
2006-12-07-LargeAlloca.ll
2006-12-07-SelectCrash.ll
2007-01-04-ArgExtension.ll
2007-01-15-AsmDialect.ll
2007-01-29-lbrx-asm.ll
2007-01-31-InlineAsmAddrMode.ll
2007-02-16-AlignPacked.ll
2007-02-16-InlineAsmNConstraint.ll
2007-02-23-lr-saved-twice.ll
2007-03-24-cntlzd.ll
2007-03-30-SpillerCrash.ll
2007-04-24-InlineAsm-I-Modifier.ll
2007-04-30-InlineAsmEarlyClobber.ll
2007-05-03-InlineAsm-S-Constraint.ll
2007-05-14-InlineAsmSelectCrash.ll
2007-05-22-tailmerge-3.ll
2007-05-30-dagcombine-miscomp.ll
2007-06-28-BCCISelBug.ll
2007-08-04-CoalescerAssert.ll
2007-09-04-AltivecDST.ll
2007-09-07-LoadStoreIdxForms.ll
2007-09-08-unaligned.ll
2007-09-11-RegCoalescerAssert.ll
2007-09-12-LiveIntervalsAssert.ll
2007-10-16-InlineAsmFrameOffset.ll
2007-10-18-PtrArithmetic.ll
2007-10-21-LocalRegAllocAssert2.ll
2007-10-21-LocalRegAllocAssert.ll
2007-11-04-CoalescerCrash.ll
2007-11-16-landingpad-split.ll
2007-11-19-VectorSplitting.ll
2008-02-05-LiveIntervalsAssert.ll
2008-02-09-LocalRegAllocAssert.ll
2008-03-05-RegScavengerAssert.ll
2008-03-17-RegScavengerCrash.ll
2008-03-18-RegScavengerAssert.ll
2008-03-24-AddressRegImm.ll
2008-03-24-CoalescerBug.ll
2008-03-26-CoalescerBug.ll
2008-04-10-LiveIntervalCrash.ll
2008-04-16-CoalescerBug.ll
2008-04-23-CoalescerCrash.ll
2008-05-01-ppc_fp128.ll
2008-06-19-LegalizerCrash.ll
2008-06-21-F128LoadStore.ll
2008-06-23-LiveVariablesCrash.ll
2008-07-10-SplatMiscompile.ll
2008-07-15-Bswap.ll
2008-07-15-Fabs.ll
2008-07-15-SignExtendInreg.ll
2008-07-17-Fneg.ll
2008-07-24-PPC64-CCBug.ll
2008-09-12-CoalescerBug.ll
2008-10-17-AsmMatchingOperands.ll
2008-10-28-f128-i32.ll
2008-10-28-UnprocessedNode.ll
2008-10-31-PPCF128Libcalls.ll
2008-12-02-LegalizeTypeAssert.ll
2009-01-16-DeclareISelBug.ll
2009-03-17-LSRBug.ll
2009-05-28-LegalizeBRCC.ll
2009-07-16-InlineAsm-M-Operand.ll
2009-08-17-inline-asm-addr-mode-breakage.ll
2009-09-18-carrybit.ll
2009-11-15-ProcImpDefsBug.ll
2009-11-25-ImpDefBug.ll
2010-02-04-EmptyGlobal.ll
2010-02-12-saveCR.ll
2010-03-09-indirect-call.ll
2010-04-01-MachineCSEBug.ll
2010-05-03-retaddr1.ll
2010-10-11-Fast-Varargs.ll
2010-12-18-PPCStackRefs.ll
2011-12-05-NoSpillDupCR.ll
2011-12-06-SpillAndRestoreCR.ll
2011-12-08-DemandedBitsMiscompile.ll
2012-09-16-TOC-entry-check.ll
2012-10-11-dynalloc.ll
2012-10-12-bitcast.ll
2012-11-16-mischedcall.ll
2013-05-15-preinc-fold.ll
2013-07-01-PHIElimBug.ll
2016-01-07-BranchWeightCrash.ll
2016-04-16-ADD8TLS.ll
2016-04-17-combine.ll
2016-04-28-setjmp.ll
a2-fp-basic.ll
a2q-stackalign.ll
a2q.ll
aa-tbaa.ll
aantidep-def-ec.mir
aantidep-inline-asm-use.ll
add-fi.ll
addc.ll
addi-licm.ll
addi-offset-fold.ll
addi-reassoc.ll
addisdtprelha-nonr3.mir
addrfuncstr.ll
aggressive-anti-dep-breaker-subreg.ll
alias.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
align.ll
allocate-r0.ll
altivec-ord.ll
and_add.ll
and_sext.ll
and_sra.ll
and-branch.ll
and-elim.ll
and-imm.ll
andc.ll
anon_aggr.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2016-12-14 16:43:44 +00:00
anyext_srl.ll
arr-fp-arg-no-copy.ll
ashr-neg1.ll
asm-constraints.ll
asm-dialect.ll
asm-printer-topological-order.ll
asm-Zy.ll
asym-regclass-copy.ll
atomic-1.ll
atomic-2.ll
atomic-minmax.ll
Atomics-64.ll
atomics-fences.ll
atomics-indexed.ll
atomics.ll
available-externally.ll
bdzlr.ll
big-endian-actual-args.ll
big-endian-call-result.ll
big-endian-formal-args.ll
bitcasts-direct-move.ll
bitreverse.ll
blockaddress.ll
BoolRetToIntTest.ll
bperm.ll
branch-hint.ll
branch-opt.ll
BreakableToken-reduced.ll
bswap-load-store.ll
build-vector-tests.ll [PPC] corrections in two testcases 2016-12-16 00:33:07 +00:00
buildvec_canonicalize.ll
builtins-ppc-elf2-abi.ll
builtins-ppc-p8vector.ll
bv-pres-v8i1.ll
bv-widen-undef.ll
byval-agg-info.ll
byval-aliased.ll
calls.ll
can-lower-ret.ll
cannonicalize-vector-shifts.ll
cc.ll
change-no-infs.ll [TM] Restore default TargetOptions in TargetMachine::resetTargetOptions. 2017-01-10 23:43:04 +00:00
cmp-cmp.ll
cmpb-ppc32.ll
cmpb.ll
coal-sections.ll
coalesce-ext.ll
code-align.ll
combine-to-pre-index-store-crash.ll
compare-duplicate.ll
compare-simm.ll
complex-return.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2016-12-14 16:43:44 +00:00
constants-i64.ll
constants.ll
copysignl.ll
cr1eq-no-extra-moves.ll
cr1eq.ll
cr_spilling.ll
cr-spills.ll
crash.ll
crbit-asm-disabled.ll
crbit-asm.ll [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
crbits.ll [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
crsave.ll
crypto_bifs.ll
ctr-cleanup.ll
ctr-loop-tls-const.ll
ctr-minmaxnum.ll
ctrloop-asm.ll
ctrloop-cpsgn.ll
ctrloop-fp64.ll
ctrloop-i64.ll
ctrloop-intrin.ll
ctrloop-large-ec.ll
ctrloop-le.ll
ctrloop-lt.ll
ctrloop-ne.ll
ctrloop-reg.ll
ctrloop-s000.ll
ctrloop-sh.ll
ctrloop-sums.ll
ctrloop-udivti3.ll
ctrloops-softfloat.ll
ctrloops.ll
cttz.ll
cxx_tlscc64.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
darwin-labels.ll
dbg.ll
DbgValueOtherTargets.test
dcbt-sched.ll
delete-node.ll
direct-move-profit.ll
div-2.ll
div-e-32.ll
div-e-all.ll
dyn-alloca-aligned.ll
dyn-alloca-offset.ll
e500-1.ll
early-ret2.ll
early-ret.ll
ec-input.ll
eh-dwarf-cfa.ll
empty-functions.ll
emptystruct.ll
emutls_generic.ll
eqv-andc-orc-nor.ll
expand-contiguous-isel.ll [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
expand-isel-1.mir [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
expand-isel-2.mir [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
expand-isel-3.mir [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
expand-isel-4.mir [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
expand-isel-5.mir [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
expand-isel-6.mir [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
expand-isel-7.mir [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
expand-isel-8.mir [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
expand-isel.ll [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
ext-bool-trunc-repl.ll
extra-toc-reg-deps.ll
extsh.ll
f32-to-i64.ll
fabs.ll
fast-isel-binary.ll
fast-isel-br-const.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
fast-isel-call.ll
fast-isel-cmp-imm.ll
fast-isel-const.ll
fast-isel-conversion-p5.ll
fast-isel-conversion.ll
fast-isel-crash.ll
fast-isel-ext.ll
fast-isel-fcmp-nan.ll
fast-isel-fold.ll
fast-isel-fpconv.ll
fast-isel-GEP-coalesce.ll
fast-isel-i64offset.ll
fast-isel-icmp-split.ll
fast-isel-indirectbr.ll
fast-isel-load-store-vsx.ll
fast-isel-load-store.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
fast-isel-redefinition.ll
fast-isel-ret.ll
fast-isel-shifter.ll
fastisel-gep-promote-before-add.ll
fcpsgn.ll
fdiv-combine.ll
float-asmprint.ll
float-to-int.ll
floatPSA.ll
flt-preinc.ll
fma-assoc.ll
fma-ext.ll
fma-mutate-duplicate-vreg.ll
fma-mutate-register-constraint.ll
fma-mutate.ll
fma.ll
fmaxnum.ll
fminnum.ll
fnabs.ll
fneg.ll
fold-li.ll
fold-zero.ll [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
fp2int2fp-ppcfp128.ll
fp64-to-int16.ll [Legalizer] Fix fp-to-uint to fp-tosint promotion assertion. 2017-01-04 22:11:42 +00:00
fp128-bitcast-after-operation.ll
fp_to_uint.ll
fp-branch.ll
fp-int-conversions-direct-moves.ll
fp-int-fp.ll
fp-to-int-ext.ll
fp-to-int-to-fp.ll
fpcopy.ll
frame-size.ll
frameaddr.ll
Frames-alloca.ll
Frames-large.ll
Frames-leaf.ll
Frames-small.ll
frounds.ll
fsel.ll
fsl-e500mc.ll
fsl-e5500.ll
fsqrt.ll
func-addr-consts.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
func-addr.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
glob-comp-aa-crash.ll
hello-reloc.s
hello.ll
hidden-vis-2.ll
hidden-vis.ll
htm.ll
i1-ext-fold.ll [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
i1-to-double.ll [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
i32-to-float.ll
i64_fp_round.ll [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
i64_fp.ll
i64-to-float.ll
i128-and-beyond.ll
ia-mem-r0.ll
ia-neg-const.ll
iabs.ll
ifcvt-forked-bug-2016-08-08.ll
ifcvt.ll [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
illegal-element-type.ll
in-asm-f64-reg.ll
indexed-load.ll
indirect-hidden.ll
indirectbr.ll
inline-asm-s-modifier.ll
inline-asm-scalar-to-vector-error.ll
inlineasm-copy.ll
inlineasm-i64-reg.ll
int-fp-conv-0.ll
int-fp-conv-1.ll
inverted-bool-compares.ll
isel-rc-nox0.ll
isel.ll [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
ispositive.ll
itofp128.ll
jaggedstructs.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2016-12-14 16:43:44 +00:00
LargeAbsoluteAddr.ll
lbz-from-ld-shift.ll
lbzux.ll
ld-st-upd.ll
ldtoc-inv.ll
lha.ll
lit.local.cfg
load-constant-addr.ll
load-shift-combine.ll
load-two-flts.ll
load-v4i8-improved.ll
long-compare.ll
longcall.ll
longdbl-truncate.ll
loop-data-prefetch-inner.ll
loop-data-prefetch.ll
loop-prep-all.ll
lsa.ll
lsr-postinc-pos.ll
lxvw4x-bug.ll
machine-combiner.ll
mask64.ll
mature-mc-support.ll
mc-instrlat.ll
mcm-1.ll
mcm-2.ll
mcm-3.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
mcm-4.ll
mcm-5.ll Always use relative jump table encodings on PowerPC64. 2016-11-16 00:37:30 +00:00
mcm-6.ll
mcm-7.ll
mcm-8.ll
mcm-9.ll
mcm-10.ll
mcm-11.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
mcm-12.ll
mcm-13.ll
mcm-default.ll
mcm-obj-2.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
mcm-obj.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
mcount-insertion.ll
mem_update.ll
mem-rr-addr-mode.ll
memcpy-vec.ll
memset-nc-le.ll
memset-nc.ll
merge-st-chain-op.ll
MergeConsecutiveStores.ll
mftb.ll
misched-inorder-latency.ll Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
misched.ll
mul-neg-power-2.ll
mul-with-overflow.ll
mulhs.ll
mulli64.ll
mult-alt-generic-powerpc64.ll
mult-alt-generic-powerpc.ll
multi-return.ll
named-reg-alloc-r0.ll
named-reg-alloc-r1-64.ll
named-reg-alloc-r1.ll
named-reg-alloc-r2-64.ll
named-reg-alloc-r2.ll
named-reg-alloc-r13-64.ll
named-reg-alloc-r13.ll
neg.ll
negate-i1.ll
negctr.ll
no-dead-strip.ll
no-dup-spill-fp.ll
no-ext-with-count-zeros.ll
no-extra-fp-conv-ldst.ll
no-pref-jumps.ll
no-rlwimi-trivial-commute.mir
novrsave.ll
opt-cmp-inst-cr0-live.ll
opt-sub-inst-cr0-live.mir
optcmp.ll [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
optnone-crbits-i1-ret.ll
or-addressing-mode.ll
p8-isel-sched.ll [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
p8-scalar_vector_conversions.ll [PowerPC] Improvements for BUILD_VECTOR Vol. 1 2016-11-29 16:11:34 +00:00
p8altivec-shuffles-pred.ll
p9-vector-compares-and-counts.ll
p9-xxinsertw-xxextractuw.ll [PPC] Add intrinsics for vector extract word and vector insert word. 2016-12-09 17:21:42 +00:00
peephole-align.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
pie.ll
pip-inner.ll
popcnt.ll
post-ra-ec.ll
power9-moves-and-splats.ll [Power9] Allow AnyExt immediates for XXSPLTIB 2016-12-15 11:16:20 +00:00
ppc32-align-long-double-sf.ll
ppc32-constant-BE-ppcf128.ll
ppc32-cyclecounter.ll
ppc32-i1-vaarg.ll
ppc32-lshrti3.ll
ppc32-nest.ll
ppc32-pic-large.ll
ppc32-pic.ll
ppc32-skip-regs.ll
ppc32-vacopy.ll
ppc64-32bit-addic.ll
ppc64-abi-extend.ll
ppc64-align-long-double.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2016-12-14 16:43:44 +00:00
ppc64-altivec-abi.ll
ppc64-anyregcc-crash.ll
ppc64-anyregcc.ll
ppc64-blnop.ll [PowerPC] Fix logic dealing with nop after calls (and tail-call eligibility) 2017-01-04 21:05:13 +00:00
ppc64-byval-align.ll
ppc64-calls.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
ppc64-crash.ll
ppc64-cyclecounter.ll
ppc64-elf-abi.ll
ppc64-fastcc-fast-isel.ll
ppc64-fastcc.ll
ppc64-func-desc-hoist.ll
ppc64-gep-opt.ll
ppc64-i128-abi.ll Revert https://reviews.llvm.org/rL287679 2016-11-29 23:00:33 +00:00
ppc64-icbt-pwr7.ll
ppc64-icbt-pwr8.ll
ppc64-linux-func-size.ll
ppc64-nest.ll
ppc64-nonfunc-calls.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
ppc64-patchpoint.ll
ppc64-prefetch.ll
ppc64-r2-alloc.ll
ppc64-sibcall-shrinkwrap.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
ppc64-sibcall.ll [PowerPC] Fix logic dealing with nop after calls (and tail-call eligibility) 2017-01-04 21:05:13 +00:00
ppc64-smallarg.ll
ppc64-stackmap-nops.ll
ppc64-stackmap.ll
ppc64-toc.ll
ppc64-vaarg-int.ll
ppc64-zext.ll
ppc64le-aggregates.ll
ppc64le-calls.ll
ppc64le-crsave.ll
ppc64le-localentry-large.ll
ppc64le-localentry.ll
ppc64le-smallarg.ll
ppc440-fp-basic.ll
ppc440-msync.ll
ppc-crbits-onoff.ll [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
ppc-empty-fs.ll
ppc-prologue.ll
ppc-shrink-wrapping.ll
ppc-vaarg-agg.ll
ppcf128-1-opt.ll
ppcf128-1.ll
ppcf128-2.ll
ppcf128-3.ll
ppcf128-4.ll
ppcf128-endian.ll
ppcf128sf.ll
ppcsoftops.ll
pr3711_widen_bit.ll
pr12757.ll
pr13641.ll
pr13891.ll
pr15031.ll
pr15359.ll
pr15630.ll
pr15632.ll
pr16556-2.ll
pr16556.ll
pr16573.ll
pr17168.ll Renumber testcase metadata nodes after r290153. 2016-12-22 00:45:21 +00:00
pr17354.ll
pr18663-2.ll
pr18663.ll
pr20442.ll
pr22711.ll
pr24216.ll
pr24546.ll [IR] Remove the DIExpression field from DIGlobalVariable. 2016-12-20 02:09:43 +00:00
pr24636.ll
pr25157-peephole.ll
pr25157.ll
pr26180.ll
pr26193.ll
pr26356.ll
pr26378.ll
pr26381.ll
pr26617.ll
pr26690.ll
pr27078.ll
pr27350.ll
pr28130.ll
pr28630.ll
pr30451.ll
pr30640.ll
pr30663.ll
pr30715.ll
pr31144.ll [PPC] Prefer direct move on power8 if load 1 or 2 bytes to VSR 2016-12-12 22:09:02 +00:00
preinc-ld-sel-crash.ll
preincprep-invoke.ll
preincprep-nontrans-crash.ll
private.ll
pwr3-6x.ll
pwr7-gt-nop.ll
pzero-fp-xored.ll
qpx-bv-sint.ll
qpx-bv.ll
qpx-func-clobber.ll
qpx-load-splat.ll
qpx-load.ll
qpx-recipest.ll
qpx-rounding-ops.ll
qpx-s-load.ll
qpx-s-sel.ll
qpx-s-store.ll
qpx-sel.ll
qpx-split-vsetcc.ll
qpx-store.ll
qpx-unal-cons-lds.ll
qpx-unalperm.ll
quadint-return.ll
r31.ll
recipest.ll
reg-coalesce-simple.ll
reg-names.ll
reloc-align.ll
remap-crash.ll
remat-imm.ll
remove-redundant-moves.ll
resolvefi-basereg.ll
resolvefi-disp.ll
retaddr2.ll
retaddr.ll
return-val-i128.ll
rlwimi2.ll
rlwimi3.ll
rlwimi-and-or-bits.ll
rlwimi-and.ll
rlwimi-commute.ll
rlwimi-dyn-and.ll
rlwimi-keep-rsh.ll
rlwimi.ll
rlwinm2.ll
rlwinm-zero-ext.ll
rlwinm.ll
rm-zext.ll
rotl-2.ll
rotl-64.ll
rotl-rotr-crash.ll
rotl.ll
rounding-ops.ll
rs-undef-use.ll
s000-alias-misched.ll
sdag-ppcf128.ll
sdiv-pow2.ll
sections.ll
select_lt0.ll
select-cc.ll
select-i1-vs-i1.ll [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
selectiondag-extload-computeknownbits.ll
set0-v8i16.ll
setcc_no_zext.ll
setcc-to-sub.ll [PPC][DAGCombine] Convert SETCC to subtract when the result is zero extended 2016-11-18 10:41:44 +00:00
setcclike-or-comb.ll
seteq-0.ll
shift128.ll
shift_mask.ll [PowerPC] Add ppc support to update_llc_test_checks.py, and ppc tests. NFC. 2016-12-22 20:59:39 +00:00
shift-cmp.ll
shl_elim.ll
shl_sext.ll
sign_ext_inreg1.ll
sj-ctr-loop.ll
sjlj.ll
small-arguments.ll
spill-nor0.ll
splat-bug.ll
split-index-tc.ll
srl-mask.ll
stack-no-redzone.ll
stack-protector.ll
stack-realign.ll
stackmap-frame-setup.ll
std-unal-fi.ll
stdux-constuse.ll
stfiwx-2.ll
stfiwx.ll
store-load-fwd.ll
store-update.ll
structsinmem.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2016-12-14 16:43:44 +00:00
structsinregs.ll Revert "In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled." 2016-12-14 16:43:44 +00:00
stubs.ll
stwu8.ll
stwu-gta.ll
stwux.ll
sub-bv-types.ll
subc.ll
subreg-postra-2.ll [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
subreg-postra.ll [PowerPC] Expand ISEL instruction into if-then-else sequence. 2017-01-16 20:12:26 +00:00
svr4-redzone.ll
swaps-le-1.ll [PPC] Use CHECK-DAG instead of CHECK in the testcase 2016-12-15 20:51:09 +00:00
swaps-le-2.ll Revert https://reviews.llvm.org/rL287679 2016-11-29 23:00:33 +00:00
swaps-le-3.ll
swaps-le-4.ll
swaps-le-5.ll
swaps-le-6.ll
swaps-le-7.ll
tail-dup-analyzable-fallthrough.ll
tail-dup-branch-to-fallthrough.ll
tail-dup-layout.ll Revert "CodeGen: Allow small copyable blocks to "break" the CFG." 2017-01-11 19:55:19 +00:00
tailcall1-64.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
tailcall1.ll
tailcall-string-rvo.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
tailcallpic1.ll
thread-pointer.ll
tls_get_addr_clobbers.ll
tls_get_addr_stackframe.ll
tls-cse.ll
tls-pic.ll
tls-store2.ll
tls.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
toc-load-sched-bug.ll
trampoline.ll
unal4-std.ll
unal-altivec2.ll
unal-altivec-wint.ll
unal-altivec.ll
unal-vec-ldst.ll
unal-vec-negarith.ll
unaligned.ll
unsafe-math.ll
unwind-dw2-g.ll
unwind-dw2.ll
vaddsplat.ll
varargs-struct-float.ll
varargs.ll
variable_elem_vec_extracts.ll DAG: Avoid OOB when legalizing vector indexing 2017-01-10 22:02:30 +00:00
vcmp-fold.ll
vec_abs.ll
vec_absd.ll
vec_add_sub_doubleword.ll
vec_add_sub_quadword.ll DAG: Fold out out of bounds insert_vector_elt 2016-12-03 23:03:26 +00:00
vec_auto_constant.ll
vec_br_cmp.ll
vec_buildvector_loadstore.ll
vec_call.ll
vec_clz.ll
vec_cmp.ll
vec_cmpd.ll
vec_constants.ll
vec_conv.ll
vec_extload.ll
vec_fmuladd.ll
vec_fneg.ll
vec_insert.ll
vec_mergeow.ll
vec_minmax.ll
vec_misaligned.ll
vec_mul_even_odd.ll
vec_mul.ll
vec_perf_shuffle.ll
vec_popcnt.ll
vec_rotate_shift.ll
vec_rounding.ll
vec_select.ll
vec_shift.ll
vec_shuffle_le.ll
vec_shuffle_p8vector_le.ll
vec_shuffle_p8vector.ll
vec_shuffle.ll
vec_splat_constant.ll
vec_splat.ll
vec_sqrt.ll
vec_urem_const.ll
vec_veqv_vnand_vorc.ll
vec_vrsave.ll
vec_zero.ll
vec-abi-align.ll
vec-asm-disabled.ll
vector-identity-shuffle.ll
vector-merge-store-fp-constants.ll
vector.ll
vperm-instcombine.ll
vperm-lowering.ll
vrsave-spill.ll
vrspill.ll
vsel-prom.ll
vsx_insert_extract_le.ll
vsx_scalar_ld_st.ll
vsx_shuffle_le.ll
vsx-args.ll
VSX-DForm-Scalars.ll
vsx-div.ll
vsx-elementary-arith.ll
vsx-fma-m.ll
vsx-fma-mutate-trivial-copy.ll
vsx-fma-mutate-undef.ll
vsx-fma-sp.ll
vsx-infl-copy1.ll
vsx-infl-copy2.ll
vsx-ldst-builtin-le.ll
vsx-ldst.ll Revert https://reviews.llvm.org/rL287679 2016-11-29 23:00:33 +00:00
vsx-minmax.ll
vsx-p8.ll
vsx-p9.ll [Power9] Add patterns for vnegd, vnegw 2016-11-18 11:05:55 +00:00
vsx-partword-int-loads-and-stores.ll [PowerPC] Improvements for BUILD_VECTOR Vol. 4 2016-12-06 11:47:14 +00:00
vsx-recip-est.ll
vsx-self-copy.ll
vsx-spill-norwstore.ll
vsx-spill.ll
vsx-vec-spill.ll
vsx-word-splats.ll
vsx.ll Use PIC relocation model as default for PowerPC64 ELF. 2016-12-15 00:01:53 +00:00
vtable-reloc.ll
weak_def_can_be_hidden.ll
xvcmpeqdp-v2f64.ll
xxleqv_xxlnand_xxlorc.ll
zero-not-run.ll
zext-free.ll