Dmitry Preobrazhensky 97d150850a [AMDGPU][MC][GFX8+][DISASSEMBLER] Corrected 1/2pi value for 64-bit operands ... See bug 39332: https://bugs.llvm.org/show_bug.cgi?id=39332 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D56794 llvm-svn: 351555		2019-01-18 15:17:17 +00:00
..
AArch64	[AArch64] Move feature predctrl to predres	2019-01-09 11:24:15 +00:00
AMDGPU	[AMDGPU][MC][GFX8+][DISASSEMBLER] Corrected 1/2pi value for 64-bit operands	2019-01-18 15:17:17 +00:00
ARC
ARM	[NFC] Fix missing testfile change of rL350299	2019-01-03 12:48:06 +00:00
Hexagon
Lanai
Mips
MSP430	[MSP430] Minor fixes/improvements for assembler/disassembler	2019-01-10 22:59:50 +00:00
PowerPC
RISCV	[RISCV] Fix test/MC/Disassembler/RISCV/invalid-instruction.txt after rL347988	2018-12-03 10:35:46 +00:00
Sparc	[Sparc] Add membar assembler tags	2018-12-13 15:29:12 +00:00
SystemZ
WebAssembly	[WebAssembly] Massive instruction renaming	2019-01-08 06:25:55 +00:00
X86
XCore