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llvm-mirror/docs/AMDGPU/gfx10_perm_smem.rst
Dmitry Preobrazhensky d2c3f2c3bb [AMDGPU][MC][DOC] Updated AMD GPU assembler syntax description.
Summary of changes:
- added description of GFX10;
- added description of operands sccz, vccz, lds_direct, etc;
- minor bugfixing and improvements.

llvm-svn: 365347
2019-07-08 16:50:11 +00:00

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.. _amdgpu_synid10_perm_smem:
imm3
===========================
A bit mask which indicates request permissions.
This operand must be specified as an :ref:`integer_number<amdgpu_synid_integer_number>`. The value is truncated to 7 bits, but only 3 low bits are significant.
============ ==============================
Bit Number Description
============ ==============================
0 Request *read* permission.
1 Request *write* permission.
2 Request *execute* permission.
============ ==============================