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llvm-mirror/test/CodeGen/ARM/ifcvt_diamond_unanalyzable.mir
Puyan Lotfi d4c615be8c Followup on Proposal to move MIR physical register namespace to '$' sigil.
Discussed here:

http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html

In preparation for adding support for named vregs we are changing the sigil for
physical registers in MIR to '$' from '%'. This will prevent name clashes of
named physical register with named vregs.

llvm-svn: 323922
2018-01-31 22:04:26 +00:00

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# RUN: llc -mtriple=arm-apple-ios -run-pass=if-converter %s -o - | FileCheck %s
---
name: foo
body: |
bb.0:
Bcc %bb.2, 1, $cpsr
bb.1:
$sp = tADDspi $sp, 1, 14, _
B %bb.3
bb.2:
$sp = tADDspi $sp, 2, 14, _
B %bb.3
bb.3:
successors:
$sp = tADDspi $sp, 3, 14, _
BX_RET 14, _
...
# Diamond testcase with unanalyzable instruction in the BB following the
# diamond.
# CHECK: body: |
# CHECK: bb.0:
# CHECK: $sp = tADDspi $sp, 2, 1, $cpsr
# CHECK: $sp = tADDspi $sp, 1, 0, $cpsr, implicit $sp
# CHECK: $sp = tADDspi $sp, 3, 14, $noreg
# CHECK: BX_RET 14, $noreg