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llvm-mirror/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir
Matt Arsenault cc12b285b6 CodeGen: Print/parse LLTs in MachineMemOperands
This will currently accept the old number of bytes syntax, and convert
it to a scalar. This should be removed in the near future (I think I
converted all of the tests already, but likely missed a few).

Not sure what the exact syntax and policy should be. We can continue
printing the number of bytes for non-generic instructions to avoid
test churn and only allow non-scalar types for generic instructions.

This will currently print the LLT in parentheses, but accept parsing
the existing integers and implicitly converting to scalar. The
parentheses are a bit ugly, but the parser logic seems unable to deal
without either parentheses or some keyword to indicate the start of a
type.
2021-06-30 16:54:13 -04:00

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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX7 %s
---
name: fmaxnum_ieee_f32_f64_ieee_mode_on
legalized: true
regBankSelected: true
machineFunctionInfo:
mode:
ieee: true
body: |
bb.0:
liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr3_vgpr4, $sgpr10_sgpr11, $vgpr10_vgpr11, $vgpr12_vgpr13
; GFX7-LABEL: name: fmaxnum_ieee_f32_f64_ieee_mode_on
; GFX7: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX7: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
; GFX7: [[COPY4:%[0-9]+]]:sreg_64 = COPY $sgpr10_sgpr11
; GFX7: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
; GFX7: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
; GFX7: %7:vgpr_32 = nofpexcept V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GFX7: %8:vgpr_32 = nofpexcept V_MAX_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX7: %9:vgpr_32 = nofpexcept V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $mode, implicit $exec
; GFX7: FLAT_STORE_DWORD [[COPY3]], %7, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32), addrspace 1)
; GFX7: FLAT_STORE_DWORD [[COPY3]], %8, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32), addrspace 1)
; GFX7: FLAT_STORE_DWORD [[COPY3]], %9, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32), addrspace 1)
; GFX7: %10:vreg_64 = nofpexcept V_MAX_F64_e64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $mode, implicit $exec
; GFX7: %11:vreg_64 = nofpexcept V_MAX_F64_e64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $mode, implicit $exec
; GFX7: %12:vreg_64 = nofpexcept V_MAX_F64_e64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $mode, implicit $exec
; GFX7: S_ENDPGM 0, implicit %10, implicit %11, implicit %12
%0:sgpr(s32) = COPY $sgpr0
%1:vgpr(s32) = COPY $vgpr0
%2:vgpr(s32) = COPY $vgpr1
%3:vgpr(p1) = COPY $vgpr3_vgpr4
%10:sgpr(s64) = COPY $sgpr10_sgpr11
%11:vgpr(s64) = COPY $vgpr10_vgpr11
%12:vgpr(s64) = COPY $vgpr12_vgpr13
; maxnum_ieee vs
%4:vgpr(s32) = G_FMAXNUM_IEEE %1, %0
; maxnum_ieee sv
%5:vgpr(s32) = G_FMAXNUM_IEEE %0, %1
; maxnum_ieee vv
%6:vgpr(s32) = G_FMAXNUM_IEEE %1, %2
G_STORE %4, %3 :: (store (s32), addrspace 1)
G_STORE %5, %3 :: (store (s32), addrspace 1)
G_STORE %6, %3 :: (store (s32), addrspace 1)
; 64-bit
; maxnum_ieee vs
%14:vgpr(s64) = G_FMAXNUM_IEEE %10, %11
; maxnum_ieee sv
%15:vgpr(s64) = G_FMAXNUM_IEEE %11, %10
; maxnum_ieee vv
%16:vgpr(s64) = G_FMAXNUM_IEEE %11, %12
S_ENDPGM 0, implicit %14, implicit %15, implicit %16
...
# FIXME: Ideally this would fail to select with ieee mode disabled
---
name: fmaxnum_ieee_f32_f64_ieee_mode_off
legalized: true
regBankSelected: true
machineFunctionInfo:
mode:
ieee: false
body: |
bb.0:
liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr3_vgpr4, $sgpr10_sgpr11, $vgpr10_vgpr11, $vgpr12_vgpr13
; GFX7-LABEL: name: fmaxnum_ieee_f32_f64_ieee_mode_off
; GFX7: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
; GFX7: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
; GFX7: [[COPY3:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
; GFX7: [[COPY4:%[0-9]+]]:sreg_64 = COPY $sgpr10_sgpr11
; GFX7: [[COPY5:%[0-9]+]]:vreg_64 = COPY $vgpr10_vgpr11
; GFX7: [[COPY6:%[0-9]+]]:vreg_64 = COPY $vgpr12_vgpr13
; GFX7: %7:vgpr_32 = nofpexcept V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $mode, implicit $exec
; GFX7: %8:vgpr_32 = nofpexcept V_MAX_F32_e64 0, [[COPY]], 0, [[COPY1]], 0, 0, implicit $mode, implicit $exec
; GFX7: %9:vgpr_32 = nofpexcept V_MAX_F32_e64 0, [[COPY1]], 0, [[COPY2]], 0, 0, implicit $mode, implicit $exec
; GFX7: FLAT_STORE_DWORD [[COPY3]], %7, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32), addrspace 1)
; GFX7: FLAT_STORE_DWORD [[COPY3]], %8, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32), addrspace 1)
; GFX7: FLAT_STORE_DWORD [[COPY3]], %9, 0, 0, implicit $exec, implicit $flat_scr :: (store (s32), addrspace 1)
; GFX7: %10:vreg_64 = nofpexcept V_MAX_F64_e64 0, [[COPY4]], 0, [[COPY5]], 0, 0, implicit $mode, implicit $exec
; GFX7: %11:vreg_64 = nofpexcept V_MAX_F64_e64 0, [[COPY5]], 0, [[COPY4]], 0, 0, implicit $mode, implicit $exec
; GFX7: %12:vreg_64 = nofpexcept V_MAX_F64_e64 0, [[COPY5]], 0, [[COPY6]], 0, 0, implicit $mode, implicit $exec
; GFX7: S_ENDPGM 0, implicit %10, implicit %11, implicit %12
%0:sgpr(s32) = COPY $sgpr0
%1:vgpr(s32) = COPY $vgpr0
%2:vgpr(s32) = COPY $vgpr1
%3:vgpr(p1) = COPY $vgpr3_vgpr4
%10:sgpr(s64) = COPY $sgpr10_sgpr11
%11:vgpr(s64) = COPY $vgpr10_vgpr11
%12:vgpr(s64) = COPY $vgpr12_vgpr13
; maxnum_ieee vs
%4:vgpr(s32) = G_FMAXNUM_IEEE %1, %0
; maxnum_ieee sv
%5:vgpr(s32) = G_FMAXNUM_IEEE %0, %1
; maxnum_ieee vv
%6:vgpr(s32) = G_FMAXNUM_IEEE %1, %2
G_STORE %4, %3 :: (store (s32), addrspace 1)
G_STORE %5, %3 :: (store (s32), addrspace 1)
G_STORE %6, %3 :: (store (s32), addrspace 1)
; 64-bit
; maxnum_ieee vs
%14:vgpr(s64) = G_FMAXNUM_IEEE %10, %11
; maxnum_ieee sv
%15:vgpr(s64) = G_FMAXNUM_IEEE %11, %10
; maxnum_ieee vv
%16:vgpr(s64) = G_FMAXNUM_IEEE %11, %12
S_ENDPGM 0, implicit %14, implicit %15, implicit %16
...