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75d19fd3ca
Summary: This change implements assembler parser, code emitter, ELF object writer and disassembler for the MSP430 ISA. Also, more instruction forms are added to the target description. Reviewers: asl Reviewed By: asl Subscribers: pftbest, krisb, mgorny, llvm-commits Differential Revision: https://reviews.llvm.org/D53661 llvm-svn: 346374
38 lines
685 B
LLVM
38 lines
685 B
LLVM
; RUN: llc -march=msp430 < %s | FileCheck %s
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target datalayout = "e-p:16:8:8-i8:8:8-i16:8:8-i32:8:8"
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target triple = "msp430-generic-generic"
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define i8 @mov() nounwind {
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; CHECK-LABEL: mov:
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; CHECK: mov.b #1, r12
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ret i8 1
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}
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define i8 @add(i8 %a, i8 %b) nounwind {
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; CHECK-LABEL: add:
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; CHECK: inc.b r12
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%1 = add i8 %a, 1
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ret i8 %1
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}
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define i8 @and(i8 %a, i8 %b) nounwind {
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; CHECK-LABEL: and:
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; CHECK: and.b #1, r12
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%1 = and i8 %a, 1
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ret i8 %1
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}
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define i8 @bis(i8 %a, i8 %b) nounwind {
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; CHECK-LABEL: bis:
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; CHECK: bis.b #1, r12
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%1 = or i8 %a, 1
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ret i8 %1
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}
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define i8 @xor(i8 %a, i8 %b) nounwind {
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; CHECK-LABEL: xor:
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; CHECK: xor.b #1, r12
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%1 = xor i8 %a, 1
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ret i8 %1
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}
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