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llvm-mirror/test/CodeGen/AArch64/framelayout-scavengingslot.mir
Sander de Smalen d7fe459f10 [AArch64][SVE] Correctly allocate scavenging slot in presence of SVE.
This patch addresses two issues:

* Forces the availability of the base-pointer (x19) when the frame has
  both scalable vectors and variable-length arrays. Otherwise it will
  be expensive to access non-SVE locals.

* In presence of SVE stack objects, it will allocate the emergency
  scavenging slot close to the SP, so that they can be accessed from
  the SP or BP if available. If accessed from the frame-pointer, it will
  otherwise need an extra register to access the scavenging slot because
  of mixed scalable/non-scalable addressing modes.

Reviewers: efriedma, ostannard, cameron.mcinally, rengolin, david-arm

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D70174
2020-07-22 10:50:36 +01:00

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# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass=prologepilog %s -o - | FileCheck %s
---
# This test verifies that the emergency scavenging slot is located near
# the SP when the stack is realigned.
name: LateScavengingSlotRealignment
# CHECK-LABEL: name: LateScavengingSlotRealignment
# CHECK: bb.0:
# CHECK: STRXui killed $[[SCRATCH:x[0-9]+]], $sp, 3
# CHECK-NEXT: $[[SCRATCH]] = ADDXri $sp, 40, 0
# CHECK-NEXT: STRXui $x0, killed $[[SCRATCH]], 4095
# CHECK-NEXT: $[[SCRATCH]] = LDRXui $sp, 3
# CHECK: bb.1:
tracksRegLiveness: true
frameInfo:
isFrameAddressTaken: true
stack:
- { id: 0, size: 16, alignment: 16 }
- { id: 1, size: 32768, alignment: 32 }
body: |
bb.0:
liveins: $x0, $x8
STRXui $x0, %stack.0, 0
B %bb.1
bb.1:
liveins: $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $x18, $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $lr
RET_ReallyLR implicit $x19, implicit $x20, implicit $x21, implicit $x22, implicit $x23, implicit $x24, implicit $x25, implicit $x26, implicit $x27, implicit $x28, implicit $lr
...