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a5dbdf7807
Summary: This will result opcode MULX32Hrm been emitted to MULX32Hrr. Reviewed by: craig.topper Differential Revision: https://reviews.llvm.org/D82472
18 lines
548 B
LLVM
18 lines
548 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686 -mcpu=skylake | FileCheck %s
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; Fix for a typo introduced by D80500
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define i32 @load_fold_udiv1(i32* %p) {
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; CHECK-LABEL: load_fold_udiv1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl $-2004318071, %edx # imm = 0x88888889
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; CHECK-NEXT: mulxl (%eax), %eax, %eax
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; CHECK-NEXT: shrl $3, %eax
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; CHECK-NEXT: retl
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%v = load i32, i32* %p, align 4
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%ret = udiv i32 %v, 15
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ret i32 %ret
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}
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