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4bf7d5872e
Upgrade of the IR text tests should be the only thing blocking making typed byval mandatory. Partially done through regex and partially manual.
190 lines
4.6 KiB
LLVM
190 lines
4.6 KiB
LLVM
; RUN: opt < %s -bounds-checking -S | FileCheck %s
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; RUN: opt < %s -passes=bounds-checking -S | FileCheck %s
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target datalayout = "e-p:64:64:64-p1:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128"
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@.str = private constant [8 x i8] c"abcdefg\00" ; <[8 x i8]*>
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@.str_as1 = private addrspace(1) constant [8 x i8] c"abcdefg\00" ; <[8 x i8] addrspace(1)*>
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declare noalias i8* @malloc(i64) nounwind
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declare noalias i8* @calloc(i64, i64) nounwind
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declare noalias i8* @realloc(i8* nocapture, i64) nounwind
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; CHECK: @f1
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define void @f1() nounwind {
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%1 = tail call i8* @malloc(i64 32)
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%2 = bitcast i8* %1 to i32*
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%idx = getelementptr inbounds i32, i32* %2, i64 2
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; CHECK-NOT: trap
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store i32 3, i32* %idx, align 4
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ret void
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}
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; CHECK: @f2
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define void @f2() nounwind {
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%1 = tail call i8* @malloc(i64 32)
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%2 = bitcast i8* %1 to i32*
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%idx = getelementptr inbounds i32, i32* %2, i64 8
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; CHECK: trap
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store i32 3, i32* %idx, align 4
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ret void
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}
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; CHECK: @f3
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define void @f3(i64 %x) nounwind {
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%1 = tail call i8* @calloc(i64 4, i64 %x)
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%2 = bitcast i8* %1 to i32*
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%idx = getelementptr inbounds i32, i32* %2, i64 8
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; CHECK: mul i64 4, %
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; CHECK: sub i64 {{.*}}, 32
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; CHECK-NEXT: icmp ult i64 {{.*}}, 32
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; CHECK-NEXT: icmp ult i64 {{.*}}, 4
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; CHECK-NEXT: or i1
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; CHECK: trap
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store i32 3, i32* %idx, align 4
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ret void
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}
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; CHECK: @store_volatile
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define void @store_volatile(i64 %x) nounwind {
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%1 = tail call i8* @calloc(i64 4, i64 %x)
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%2 = bitcast i8* %1 to i32*
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%idx = getelementptr inbounds i32, i32* %2, i64 8
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; CHECK-NOT: trap
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store volatile i32 3, i32* %idx, align 4
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ret void
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}
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; CHECK: @f4
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define void @f4(i64 %x) nounwind {
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%1 = tail call i8* @realloc(i8* null, i64 %x) nounwind
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%2 = bitcast i8* %1 to i32*
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%idx = getelementptr inbounds i32, i32* %2, i64 8
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; CHECK: trap
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%3 = load i32, i32* %idx, align 4
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ret void
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}
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; CHECK: @f5
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define void @f5(i64 %x) nounwind {
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%idx = getelementptr inbounds [8 x i8], [8 x i8]* @.str, i64 0, i64 %x
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; CHECK: trap
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%1 = load i8, i8* %idx, align 4
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ret void
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}
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define void @f5_as1(i64 %x) nounwind {
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; CHECK: @f5_as1
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%idx = getelementptr inbounds [8 x i8], [8 x i8] addrspace(1)* @.str_as1, i64 0, i64 %x
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; CHECK: sub i16
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; CHECK: icmp ult i16
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; CHECK: trap
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%1 = load i8, i8 addrspace(1)* %idx, align 4
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ret void
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}
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; CHECK: @f6
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define void @f6(i64 %x) nounwind {
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%1 = alloca i128
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; CHECK-NOT: trap
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%2 = load i128, i128* %1, align 4
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ret void
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}
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; CHECK: @f7
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define void @f7(i64 %x) nounwind {
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%1 = alloca i128, i64 %x
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; CHECK: mul i64 16,
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; CHECK: trap
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%2 = load i128, i128* %1, align 4
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ret void
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}
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; CHECK: @f8
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define void @f8() nounwind {
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%1 = alloca i128
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%2 = alloca i128
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%3 = select i1 undef, i128* %1, i128* %2
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; CHECK-NOT: trap
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%4 = load i128, i128* %3, align 4
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ret void
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}
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; CHECK: @f9
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define void @f9(i128* %arg) nounwind {
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%1 = alloca i128
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%2 = select i1 undef, i128* %arg, i128* %1
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; CHECK-NOT: trap
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%3 = load i128, i128* %2, align 4
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ret void
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}
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; CHECK: @f10
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define void @f10(i64 %x, i64 %y) nounwind {
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%1 = alloca i128, i64 %x
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%2 = alloca i128, i64 %y
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%3 = select i1 undef, i128* %1, i128* %2
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; CHECK: select
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; CHECK: select
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; CHECK: trap
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%4 = load i128, i128* %3, align 4
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ret void
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}
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; CHECK: @f11
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define void @f11(i128* byval(i128) %x) nounwind {
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%1 = bitcast i128* %x to i8*
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%2 = getelementptr inbounds i8, i8* %1, i64 16
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; CHECK: br label
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%3 = load i8, i8* %2, align 4
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ret void
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}
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; CHECK: @f11_as1
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define void @f11_as1(i128 addrspace(1)* byval(i128) %x) nounwind {
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%1 = bitcast i128 addrspace(1)* %x to i8 addrspace(1)*
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%2 = getelementptr inbounds i8, i8 addrspace(1)* %1, i16 16
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; CHECK: br label
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%3 = load i8, i8 addrspace(1)* %2, align 4
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ret void
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}
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; CHECK: @f12
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define i64 @f12(i64 %x, i64 %y) nounwind {
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%1 = tail call i8* @calloc(i64 1, i64 %x)
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; CHECK: mul i64 %y, 8
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; CHECK: trap
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%2 = bitcast i8* %1 to i64*
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%3 = getelementptr inbounds i64, i64* %2, i64 %y
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%4 = load i64, i64* %3, align 8
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ret i64 %4
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}
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; CHECK: @load_volatile
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define i64 @load_volatile(i64 %x, i64 %y) nounwind {
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%1 = tail call i8* @calloc(i64 1, i64 %x)
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; CHECK-NOT: trap
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%2 = bitcast i8* %1 to i64*
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%3 = getelementptr inbounds i64, i64* %2, i64 %y
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%4 = load volatile i64, i64* %3, align 8
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ret i64 %4
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}
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; PR17402
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; CHECK-LABEL: @f13
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define void @f13() nounwind {
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entry:
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br label %alive
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dead:
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; Self-refential GEPs can occur in dead code.
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%incdec.ptr = getelementptr inbounds i32, i32* %incdec.ptr, i64 1
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; CHECK: %incdec.ptr = getelementptr inbounds i32, i32* %incdec.ptr
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%l = load i32, i32* %incdec.ptr
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br label %alive
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alive:
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ret void
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}
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