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d4c615be8c
Discussed here: http://lists.llvm.org/pipermail/llvm-dev/2018-January/120320.html In preparation for adding support for named vregs we are changing the sigil for physical registers in MIR to '$' from '%'. This will prevent name clashes of named physical register with named vregs. llvm-svn: 323922
61 lines
1.6 KiB
YAML
61 lines
1.6 KiB
YAML
# RUN: llc -o - %s -mtriple=arm-- -run-pass prologepilog | FileCheck %s
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--- |
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define swiftcc i8* @need_emergency_slot(i8 *swiftself %v) {
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; Just a dummy to add a swiftself bit. The real code is in the MI below.
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unreachable
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}
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...
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---
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# CHECK-LABEL: name: need_emergency_slot
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# Make sure we do not just assume an unsaved/restored callee saved register
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# is free to use. Callee saved parameters may still be used if they were used
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# to pass arguments (as in swiftself).
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name: need_emergency_slot
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tracksRegLiveness: true
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stack:
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- { id: 0, type: default, size: 8, alignment: 8 }
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- { id: 1, type: default, size: 4096, alignment: 8 }
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body: |
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bb.0:
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liveins: $r10 ; swiftself parameter comes in as $r10
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; Bring up register pressure to force emergency spilling, coax scavenging
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; to use $r10 as that one is not spilled/restored.
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$r0 = IMPLICIT_DEF
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$r1 = IMPLICIT_DEF
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$r2 = IMPLICIT_DEF
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$r3 = IMPLICIT_DEF
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$r4 = IMPLICIT_DEF
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$r5 = IMPLICIT_DEF
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$r6 = IMPLICIT_DEF
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$r7 = IMPLICIT_DEF
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$r8 = IMPLICIT_DEF
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$r9 = IMPLICIT_DEF
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$r11 = IMPLICIT_DEF
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$r12 = IMPLICIT_DEF
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$lr = IMPLICIT_DEF
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; Computing the large stack offset requires an extra register. We should
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; not just use $r10 for that.
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; CHECK-NOT: STRi12 %1,{{.*}}$r10
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STRi12 $r1, %stack.0, 0, 14, $noreg :: (store 4)
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; use the swiftself parameter value.
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KILL $r10
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KILL $r0
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KILL $r1
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KILL $r2
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KILL $r3
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KILL $r4
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KILL $r5
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KILL $r6
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KILL $r7
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KILL $r8
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KILL $r9
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KILL $r11
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KILL $r12
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KILL $lr
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...
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