Jacques Pienaar 4ab4ea3179 Rename AnalyzeBranch* to analyzeBranch*. ... Summary: NFC. Rename AnalyzeBranch/AnalyzeBranchPredicate to analyzeBranch/analyzeBranchPredicate to follow LLVM coding style and be consistent with TargetInstrInfo's analyzeCompare and analyzeSelect. Reviewers: tstellarAMD, mcrosier Subscribers: mcrosier, jholewinski, jfb, arsenm, dschuff, jyknight, dsanders, nemanjai Differential Revision: https://reviews.llvm.org/D22409 llvm-svn: 275564		2016-07-15 14:41:04 +00:00
..
AsmParser	[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support	2016-07-11 07:41:56 +00:00
Disassembler	[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support	2016-07-11 07:41:56 +00:00
InstPrinter	[mips][microMIPS] Add CodeGen support for AND*, OR16, OR*, XOR*, NOT16 and NOR instructions	2016-06-15 07:46:24 +00:00
MCTargetDesc	Fix branch relaxation in 16-bit mode.	2016-07-11 14:23:53 +00:00
TargetInfo
CMakeLists.txt
LLVMBuild.txt
MicroMips32r6InstrFormats.td	[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support	2016-07-11 07:41:56 +00:00
MicroMips32r6InstrInfo.td	[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support	2016-07-11 07:41:56 +00:00
MicroMips64r6InstrFormats.td	[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions	2016-06-27 08:23:28 +00:00
MicroMips64r6InstrInfo.td	[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions	2016-06-27 08:23:28 +00:00
MicroMipsDSPInstrFormats.td
MicroMipsDSPInstrInfo.td
MicroMipsInstrFormats.td	[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions	2016-06-27 08:23:28 +00:00
MicroMipsInstrFPU.td	[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support	2016-07-11 07:41:56 +00:00
MicroMipsInstrInfo.td	[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support	2016-07-11 07:41:56 +00:00
Mips16FrameLowering.cpp
Mips16FrameLowering.h
Mips16HardFloat.cpp	Convert more cases to isPositionIndependent(). NFC.	2016-06-28 14:33:28 +00:00
Mips16HardFloatInfo.cpp
Mips16HardFloatInfo.h
Mips16InstrFormats.td
Mips16InstrInfo.cpp	CodeGen: Use MachineInstr& in TargetInstrInfo, NFC	2016-06-30 00:01:54 +00:00
Mips16InstrInfo.h	CodeGen: Use MachineInstr& in TargetInstrInfo, NFC	2016-06-30 00:01:54 +00:00
Mips16InstrInfo.td	[mips][mips16] Fix machine verifier errors about incorrect register classes on load/stores.	2016-06-16 10:20:59 +00:00
Mips16ISelDAGToDAG.cpp	[mips] SelectionDAGISel subclasses now follow the optimization level.	2016-07-14 13:25:22 +00:00
Mips16ISelDAGToDAG.h	[mips] SelectionDAGISel subclasses now follow the optimization level.	2016-07-14 13:25:22 +00:00
Mips16ISelLowering.cpp	CodeGen: Use MachineInstr& in TargetLowering, NFC	2016-06-30 22:52:52 +00:00
Mips16ISelLowering.h	CodeGen: Use MachineInstr& in TargetLowering, NFC	2016-06-30 22:52:52 +00:00
Mips16RegisterInfo.cpp
Mips16RegisterInfo.h
Mips32r6InstrFormats.td
Mips32r6InstrInfo.td	[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support	2016-07-11 07:41:56 +00:00
Mips64InstrInfo.td	[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions	2016-06-27 08:23:28 +00:00
Mips64r6InstrInfo.td	[mips][micromips] Implement LD, LLD, LWU, SD, DSRL, DSRL32 and DSRLV instructions	2016-06-27 08:23:28 +00:00
Mips.h	Delete dead code. NFC.	2016-06-28 14:26:39 +00:00
Mips.td	[mips][atomics] Fix atomic instruction descriptions and uses.	2016-06-14 11:29:28 +00:00
MipsAnalyzeImmediate.cpp
MipsAnalyzeImmediate.h
MipsAsmPrinter.cpp	Use isPositionIndependent(). NFC.	2016-06-27 17:21:46 +00:00
MipsAsmPrinter.h
MipsCallingConv.td	[mips] EABI CodeGen is completely untested and seems to have bitrotted. Remove it.	2016-06-03 10:38:09 +00:00
MipsCCState.cpp
MipsCCState.h
MipsCondMov.td	[mips] Replace AdditionalRequires<[IsGP64bit]> with GPR_64. NFC.	2016-06-15 10:36:16 +00:00
MipsConstantIslandPass.cpp	Revert r275141 - Mips: Avoid implicit iterator conversions, NFC	2016-07-15 13:54:20 +00:00
MipsDelaySlotFiller.cpp	Rename AnalyzeBranch* to analyzeBranch*.	2016-07-15 14:41:04 +00:00
MipsDSPInstrFormats.td
MipsDSPInstrInfo.td	[mips] MIPS32/64 itineraries	2016-06-14 09:35:29 +00:00
MipsEVAInstrFormats.td
MipsEVAInstrInfo.td	[mips] MIPS32/64 itineraries	2016-06-14 09:35:29 +00:00
MipsFastISel.cpp	Convert more cases to isPositionIndependent(). NFC.	2016-06-28 14:33:28 +00:00
MipsFrameLowering.cpp
MipsFrameLowering.h
MipsHazardSchedule.cpp	Revert r275141 - Mips: Avoid implicit iterator conversions, NFC	2016-07-15 13:54:20 +00:00
MipsInstrFormats.td
MipsInstrFPU.td	[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support	2016-07-11 07:41:56 +00:00
MipsInstrInfo.cpp	Rename AnalyzeBranch* to analyzeBranch*.	2016-07-15 14:41:04 +00:00
MipsInstrInfo.h	Rename AnalyzeBranch* to analyzeBranch*.	2016-07-15 14:41:04 +00:00
MipsInstrInfo.td	[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support	2016-07-11 07:41:56 +00:00
MipsISelDAGToDAG.cpp	[mips][microMIPS] Implement LDC1, SDC1, LDC2, SDC2, LWC1, SWC1, LWC2 and SWC2 instructions and add CodeGen support	2016-07-11 07:41:56 +00:00
MipsISelDAGToDAG.h	[mips] SelectionDAGISel subclasses now follow the optimization level.	2016-07-14 13:25:22 +00:00
MipsISelLowering.cpp	CodeGen: Use MachineInstr& in TargetLowering, NFC	2016-06-30 22:52:52 +00:00
MipsISelLowering.h	CodeGen: Use MachineInstr& in TargetLowering, NFC	2016-06-30 22:52:52 +00:00
MipsLongBranch.cpp	Revert r275141 - Mips: Avoid implicit iterator conversions, NFC	2016-07-15 13:54:20 +00:00
MipsMachineFunction.cpp	[mips][mips16] Fix machine verifier errors about incorrect register classes on load/stores.	2016-06-16 10:20:59 +00:00
MipsMachineFunction.h	[mips][mips16] Fix machine verifier errors about incorrect register classes on load/stores.	2016-06-16 10:20:59 +00:00
MipsMCInstLower.cpp
MipsMCInstLower.h
MipsModuleISelDAGToDAG.cpp
MipsMSAInstrFormats.td
MipsMSAInstrInfo.td	[mips] Add instruction itineraries for LSA, DLSA	2016-06-27 14:55:07 +00:00
MipsOptimizePICCall.cpp
MipsOptionRecord.h
MipsOs16.cpp
MipsRegisterInfo.cpp
MipsRegisterInfo.h
MipsRegisterInfo.td
MipsSchedule.td	[mips] MIPS32/64 itineraries	2016-06-14 09:35:29 +00:00
MipsScheduleP5600.td
MipsSEFrameLowering.cpp	Replace silly uses of 'signed' with 'int'	2016-06-21 05:10:24 +00:00
MipsSEFrameLowering.h
MipsSEInstrInfo.cpp	CodeGen: Use MachineInstr& in TargetInstrInfo, NFC	2016-06-30 00:01:54 +00:00
MipsSEInstrInfo.h	CodeGen: Use MachineInstr& in TargetInstrInfo, NFC	2016-06-30 00:01:54 +00:00
MipsSEISelDAGToDAG.cpp	[mips] SelectionDAGISel subclasses now follow the optimization level.	2016-07-14 13:25:22 +00:00
MipsSEISelDAGToDAG.h	[mips] SelectionDAGISel subclasses now follow the optimization level.	2016-07-14 13:25:22 +00:00
MipsSEISelLowering.cpp	CodeGen: Use MachineInstr& in TargetLowering, NFC	2016-06-30 22:52:52 +00:00
MipsSEISelLowering.h	CodeGen: Use MachineInstr& in TargetLowering, NFC	2016-06-30 22:52:52 +00:00
MipsSERegisterInfo.cpp
MipsSERegisterInfo.h
MipsSubtarget.cpp	Convert more cases to isPositionIndependent(). NFC.	2016-06-28 14:33:28 +00:00
MipsSubtarget.h	Convert more cases to isPositionIndependent(). NFC.	2016-06-28 14:33:28 +00:00
MipsTargetMachine.cpp	[mips] SelectionDAGISel subclasses now follow the optimization level.	2016-07-14 13:25:22 +00:00
MipsTargetMachine.h
MipsTargetObjectFile.cpp
MipsTargetObjectFile.h
MipsTargetStreamer.h	Move instances of std::function.	2016-06-12 16:13:55 +00:00
MSA.txt