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ab043ff680
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
53 lines
1.7 KiB
LLVM
53 lines
1.7 KiB
LLVM
; REQUIRES: asserts
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; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+sse2 -stats 2>&1 | FileCheck %s
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; Now this test spills one register. But a reload in the loop is cheaper than
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; the divsd so it's a win.
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define fastcc void @fourn(double* %data, i32 %isign) nounwind {
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; CHECK: fourn
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entry:
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br label %bb
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bb: ; preds = %bb, %entry
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%indvar93 = phi i32 [ 0, %entry ], [ %idim.030, %bb ] ; <i32> [#uses=2]
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%idim.030 = add i32 %indvar93, 1 ; <i32> [#uses=1]
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%0 = add i32 %indvar93, 2 ; <i32> [#uses=1]
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%1 = icmp sgt i32 %0, 2 ; <i1> [#uses=1]
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br i1 %1, label %bb30.loopexit, label %bb
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; CHECK: %bb30.loopexit
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; CHECK: divsd %xmm0
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; CHECK: movsd %xmm0, 16(%esp)
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; CHECK: %bb3
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bb3: ; preds = %bb30.loopexit, %bb25, %bb3
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%2 = load i32, i32* null, align 4 ; <i32> [#uses=1]
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%3 = mul i32 %2, 0 ; <i32> [#uses=1]
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%4 = icmp slt i32 0, %3 ; <i1> [#uses=1]
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br i1 %4, label %bb18, label %bb3
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bb18: ; preds = %bb3
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%5 = fdiv double %11, 0.000000e+00 ; <double> [#uses=1]
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%6 = tail call double @sin(double %5) nounwind readonly ; <double> [#uses=1]
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br label %bb24.preheader
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bb22.preheader: ; preds = %bb24.preheader, %bb22.preheader
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br label %bb22.preheader
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bb25: ; preds = %bb24.preheader
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%7 = fmul double 0.000000e+00, %6 ; <double> [#uses=0]
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%8 = add i32 %i3.122100, 0 ; <i32> [#uses=1]
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%9 = icmp sgt i32 %8, 0 ; <i1> [#uses=1]
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br i1 %9, label %bb3, label %bb24.preheader
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bb24.preheader: ; preds = %bb25, %bb18
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%i3.122100 = or i32 0, 1 ; <i32> [#uses=2]
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%10 = icmp slt i32 0, %i3.122100 ; <i1> [#uses=1]
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br i1 %10, label %bb25, label %bb22.preheader
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bb30.loopexit: ; preds = %bb
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%11 = fmul double 0.000000e+00, 0x401921FB54442D1C ; <double> [#uses=1]
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br label %bb3
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}
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declare double @sin(double) nounwind readonly
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