Artem Belevich 6249886257 [CUDA, NVPTX] Allow targeting sm_86 GPUs. ... The patch only plumbs through the option necessary for targeting sm_86 GPUs w/o adding any new functionality. Differential Revision: https://reviews.llvm.org/D95974		2021-02-09 11:01:10 -08:00
..
MCTargetDesc
TargetInfo
cl_common_defines.h
CMakeLists.txt
ManagedStringPool.h
NVPTX.h	[NewPM][NVPTX] Port NVPTX opt passes	2021-01-07 15:12:35 -08:00
NVPTX.td	[CUDA, NVPTX] Allow targeting sm_86 GPUs.	2021-02-09 11:01:10 -08:00
NVPTXAllocaHoisting.cpp
NVPTXAllocaHoisting.h
NVPTXAsmPrinter.cpp
NVPTXAsmPrinter.h
NVPTXAssignValidGlobalNames.cpp
NVPTXFrameLowering.cpp
NVPTXFrameLowering.h
NVPTXGenericToNVVM.cpp
NVPTXImageOptimizer.cpp
NVPTXInstrFormats.td
NVPTXInstrInfo.cpp
NVPTXInstrInfo.h
NVPTXInstrInfo.td
NVPTXIntrinsics.td
NVPTXISelDAGToDAG.cpp	[llvm] Use the default value of drop_begin (NFC)	2021-01-18 10:16:36 -08:00
NVPTXISelDAGToDAG.h
NVPTXISelLowering.cpp	[llvm][nvptx] add atomicity to counter in ISelLowering	2021-01-19 10:20:20 +01:00
NVPTXISelLowering.h	[llvm][nvptx] add atomicity to counter in ISelLowering	2021-01-19 10:20:20 +01:00
NVPTXLowerAggrCopies.cpp
NVPTXLowerAggrCopies.h
NVPTXLowerAlloca.cpp
NVPTXLowerArgs.cpp
NVPTXMachineFunctionInfo.h
NVPTXMCExpr.cpp
NVPTXMCExpr.h
NVPTXPeephole.cpp
NVPTXPrologEpilogPass.cpp
NVPTXProxyRegErasure.cpp
NVPTXRegisterInfo.cpp
NVPTXRegisterInfo.h
NVPTXRegisterInfo.td
NVPTXReplaceImageHandles.cpp
NVPTXSubtarget.cpp
NVPTXSubtarget.h
NVPTXTargetMachine.cpp	[NVPTX][NewPM] Re-enable NVVMReflectPass	2021-02-08 13:58:17 -08:00
NVPTXTargetMachine.h	[NewPM][NVPTX] Port NVPTX opt passes	2021-01-07 15:12:35 -08:00
NVPTXTargetObjectFile.h
NVPTXTargetTransformInfo.cpp
NVPTXTargetTransformInfo.h
NVPTXUtilities.cpp
NVPTXUtilities.h
NVVMIntrRange.cpp	[NewPM][NVPTX] Port NVPTX opt passes	2021-01-07 15:12:35 -08:00
NVVMReflect.cpp	[NewPM][NVPTX] Port NVPTX opt passes	2021-01-07 15:12:35 -08:00