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Summary: Do not assume little endian architecture in DAGCombiner::visitTRUNCATE and DAGCombiner::visitEXTRACT_VECTOR_ELT. PR33682 Reviewers: hfinkel, sdardis, RKSimon Reviewed By: sdardis, RKSimon Subscribers: uabelho, RKSimon, sdardis, llvm-commits Differential Revision: https://reviews.llvm.org/D34990 llvm-svn: 308960
56 lines
1.1 KiB
LLVM
56 lines
1.1 KiB
LLVM
; RUN: llc -march=mips -mcpu=mips32 < %s | FileCheck %s --check-prefixes=ALL,BE
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; RUN: llc -march=mipsel -mcpu=mips32 < %s | FileCheck %s --check-prefixes=ALL,LE
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; Verify visitTRUNCATE respects endianness when transforming trunc to insert_vector_elt.
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; ALL-LABEL: a:
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; BE: lw $2, 4($4)
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; LE: lw $2, 0($4)
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define i32 @a(<2 x i32> * %a) {
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entry:
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%0 = load <2 x i32>, <2 x i32> * %a
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%1 = bitcast <2 x i32> %0 to i64
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%2 = trunc i64 %1 to i32
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ret i32 %2
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}
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; ALL-LABEL: b:
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; BE: lw $2, 12($4)
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; LE: lw $2, 0($4)
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define i32 @b(<4 x i32> * %a) {
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entry:
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%0 = load <4 x i32>, <4 x i32> * %a
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%1 = bitcast <4 x i32> %0 to i128
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%2 = trunc i128 %1 to i32
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ret i32 %2
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}
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; Verify visitEXTRACT_VECTOR_ELT respects endianness when transforming extract_vector_elt to a trunc.
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; ALL-LABEL: c:
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; BE: lw $2, 0($4)
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; LE: lw $2, 0($4)
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define i32 @c(i64 * %a) {
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entry:
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%0 = load i64, i64 * %a
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%1 = bitcast i64 %0 to <2 x i32>
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%2 = extractelement <2 x i32> %1, i32 0
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ret i32 %2
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}
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; ALL-LABEL: d:
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; BE: lw $2, 4($4)
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; LE: lw $2, 4($4)
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define i32 @d(i64 * %a) {
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entry:
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%0 = load i64, i64 * %a
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%1 = bitcast i64 %0 to <2 x i32>
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%2 = extractelement <2 x i32> %1, i32 1
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ret i32 %2
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}
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