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llvm-mirror/test/CodeGen
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Craig Topper f4c0ab8f37 [AVX512] Don't use 32-bit elements version of AND/OR/XOR/ANDN during isel unless we're matching a masked op or broadcast 
Selecting 32-bit element logical ops without a select or broadcast requires matching a bitconvert on the inputs to the and. But that's a weird thing to rely on. It's entirely possible that one of the inputs doesn't have a bitcast and one does.

Since there's no functional difference, just remove the extra patterns and save some isel table size.

Differential Revision: https://reviews.llvm.org/D36854

llvm-svn: 312138
2017-08-30 16:38:33 +00:00
..
AArch64 Re-land MachineInstr: Reason locally about some memory objects before going to AA. 2017-08-30 14:57:12 +00:00
AMDGPU Re-land MachineInstr: Reason locally about some memory objects before going to AA. 2017-08-30 14:57:12 +00:00
ARC [ARC] Add ARC backend. 2017-08-24 15:40:33 +00:00
ARM Re-land MachineInstr: Reason locally about some memory objects before going to AA. 2017-08-30 14:57:12 +00:00
AVR [AVR] Use the correct register classes for 16-bit atomic operations 2017-08-24 00:14:38 +00:00
BPF bpf: add variants of -mcpu=# and support for additional jmp insns 2017-08-23 04:25:57 +00:00
Generic
Hexagon [Hexagon] Check for potential bank conflicts in post-RA scheduling 2017-08-28 18:36:21 +00:00
Inputs
Lanai
Mips [MIPS] Add support to match more patterns for BBIT instruction 2017-08-30 11:25:38 +00:00
MIR Reland r311957 [codeview] support more DW_OPs for more complete debug info 2017-08-29 20:59:25 +00:00
MSP430
Nios2
NVPTX
PowerPC [DAG] convert vector select-of-constants to logic/math 2017-08-24 23:24:43 +00:00
SPARC Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding" round 2 2017-08-18 01:43:11 +00:00
SystemZ [SystemZ, MachineScheduler] Improve post-RA scheduling. 2017-08-17 08:33:44 +00:00
Thumb [ARM, Thumb1] Prevent ARMTargetLowering::isLegalAddressingMode from accepting illegal modes 2017-08-24 10:00:25 +00:00
Thumb2 [ARM] Call setBooleanContents(ZeroOrOneBooleanContent) 2017-08-22 11:02:37 +00:00
WebAssembly [WebAssembly] FastISel : Bail to SelectionDAG for constexpr calls 2017-08-24 19:53:44 +00:00
WinEH
X86 [AVX512] Don't use 32-bit elements version of AND/OR/XOR/ANDN during isel unless we're matching a masked op or broadcast 2017-08-30 16:38:33 +00:00
XCore Delete Default and JITDefault code models 2017-08-03 02:16:21 +00:00