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llvm-mirror/lib/CodeGen/GlobalISel
Jessica Paquette db301f643f [GlobalISel] Implement computeKnownBits for G_ASSERT_SEXT
Implementation is the same as G_SEXT_INREG.

Differential Revision: https://reviews.llvm.org/D96899
2021-02-17 14:00:36 -08:00
..
CallLowering.cpp GlobalISel: Handle arguments partially passed on the stack 2021-02-15 17:06:14 -05:00
CMakeLists.txt
Combiner.cpp
CombinerHelper.cpp [GlobalISel] Propagate extends through G_PHIs into the incoming value blocks. 2021-02-12 11:52:52 -08:00
CSEInfo.cpp [CodeGen] Use range-based for loops (NFC) 2021-02-12 23:44:33 -08:00
CSEMIRBuilder.cpp
GISelChangeObserver.cpp
GISelKnownBits.cpp [GlobalISel] Implement computeKnownBits for G_ASSERT_SEXT 2021-02-17 14:00:36 -08:00
GlobalISel.cpp
InlineAsmLowering.cpp
InstructionSelect.cpp [GlobalISel] Make sure G_ASSERT_ZEXT's src ends up with the same rc as dst 2021-02-01 09:46:35 -08:00
InstructionSelector.cpp
IRTranslator.cpp GlobalISel: check type size before getZExtValue()ing it. 2021-02-01 12:43:33 +00:00
LegalityPredicates.cpp
LegalizeMutations.cpp
Legalizer.cpp
LegalizerHelper.cpp [GlobalISel] Disable vector types in narrowScalarAddSub 2021-02-14 18:06:32 -05:00
LegalizerInfo.cpp
Localizer.cpp
LostDebugLocObserver.cpp
MachineIRBuilder.cpp [GlobalISel] Add G_ASSERT_SEXT 2021-02-17 13:10:34 -08:00
RegBankSelect.cpp [GlobalISel] Add G_ASSERT_SEXT 2021-02-17 13:10:34 -08:00
RegisterBank.cpp [GlobalISel] Use ListSeparator (NFC) 2021-02-04 21:18:04 -08:00
RegisterBankInfo.cpp
Utils.cpp AMDGPU/GlobalISel: Calculate isKnownNeverNaN for fminnum and fmaxnum 2021-02-12 17:14:34 +01:00