1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 02:33:06 +01:00
llvm-mirror/test/CodeGen
David Truby e0d7c39869 [AArch64][sve] Prevent incorrect function call on fixed width vector
The isEssentiallyExtractHighSubvector function currently calls
getVectorNumElements on a type that in specific cases might be scalable.
Since this function only has correct behaviour at the moment on scalable
types anyway, the function can just return false when given a fixed type.

Differential Revision: https://reviews.llvm.org/D109163

(cherry picked from commit b297531ece896fb9ec36f001a74aef144082602b)
2021-09-08 06:09:19 -07:00
..
AArch64 [AArch64][sve] Prevent incorrect function call on fixed width vector 2021-09-08 06:09:19 -07:00
AMDGPU AMDGPU/GlobalISel: Fix selecting G_SEXTLOAD/G_ZEXTLOAD pre-gfx9 2021-07-27 15:56:42 -04:00
ARC
ARM [ARM][atomicrmw] Fix CMP_SWAP_32 expand assert 2021-08-18 12:14:24 -07:00
AVR [AVR] Only support sp, r0 and r1 in llvm.read_register 2021-07-24 14:03:27 +02:00
BPF BPF: avoid NE/EQ loop exit condition 2021-08-06 12:45:53 -07:00
Generic [PowerPC] Add pwr7 and pwr10 support to IBM MASSV pass on AIX 2021-07-26 23:21:38 +00:00
Hexagon [Hexagon] Fix resetting dead registers in DBG_VALUE_LISTs 2021-07-27 18:36:28 -05:00
Inputs
Lanai
M68k [M68k][GloballSel] LegalizerInfo implementation 2021-07-15 13:00:43 -06:00
Mips [llvm][sve] Lowering for VLS truncating stores 2021-07-23 14:04:55 +01:00
MIR
MSP430
NVPTX [NVPTX] Add select(cc,binop(),binop()) fast-math tests 2021-07-18 15:30:24 +01:00
PowerPC [PowerPC] Disable CTR Loop generate for fma with the PPC double double type. 2021-08-17 20:22:13 -07:00
RISCV [RISCV] Fix reporting of incorrect commutable operand indices 2021-09-03 15:48:26 -07:00
SPARC
SystemZ [SystemZ][z/OS] Initial code to generate assembly files on z/OS 2021-07-27 11:29:15 -04:00
Thumb
Thumb2 [ARM] Implement isLoad/StoreFromStackSlot for MVE stack stores accesses 2021-07-27 09:11:58 +01:00
VE
WebAssembly [WebAssembly] Fix FastISel of condition in different block (PR51651) 2021-08-31 20:58:25 -07:00
WinCFGuard
WinEH
X86 [SelectionDAG] Fix miscompile bugs related to smul.fix.sat with scale zero 2021-08-31 20:59:28 -07:00
XCore