mirror of
https://github.com/RPCS3/llvm-mirror.git
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dce7037b89
This reverts commit e58229fded0407f3e4f77cd87bedcd4d35bb7c89. Differential Revision: https://reviews.llvm.org/D75186
334 lines
12 KiB
YAML
334 lines
12 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=thumbv7m-none-eabi -run-pass=arm-cp-islands -o - %s | FileCheck %s
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--- |
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define i32* @test_simple(i32* %x, i32 %y) { ret i32* %x }
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define i32* @test_notfirst(i32* %x, i32 %y) { ret i32* %x }
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define i32* @test_redefined(i32* %x, i32 %y) { ret i32* %x }
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define i32* @test_notredefined(i32* %x, i32 %y) { ret i32* %x }
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define i32* @test_notcmp(i32* %x, i32 %y) { ret i32* %x }
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define i32* @test_killflag_1(i32* %x, i32 %y) { ret i32* %x }
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define i32* @test_killflag_2(i32* %x, i32 %y) { ret i32* %x }
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define i32* @test_cpsr(i32* %x, i32 %y) { ret i32* %x }
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declare dso_local i32 @c(i32 %x)
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...
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---
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name: test_simple
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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; CHECK-LABEL: name: test_simple
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x30000000), %bb.1(0x50000000)
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; CHECK: liveins: $r0, $r1
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; CHECK: tCBZ $r0, %bb.2
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; CHECK: bb.1:
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; CHECK: liveins: $r0
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; CHECK: renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from %ir.x)
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; CHECK: tTAILJMPdND @c, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp, implicit killed $r0
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; CHECK: bb.2:
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; CHECK: $r0, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0
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bb.0:
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successors: %bb.1(0x30000000), %bb.2(0x50000000)
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liveins: $r0, $r1
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tCMPi8 renamable $r0, 0, 14, $noreg, implicit-def $cpsr
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t2Bcc %bb.1, 0, killed $cpsr
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bb.2:
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liveins: $r0
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renamable $r0 = tLDRi killed renamable $r0, 0, 14, $noreg :: (load 4 from %ir.x)
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tTAILJMPdND @c, 14, $noreg, implicit $sp, implicit $sp, implicit killed $r0
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bb.1:
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$r0, dead $cpsr = tMOVi8 0, 14, $noreg
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tBX_RET 14, $noreg, implicit killed $r0
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...
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---
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name: test_notfirst
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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; CHECK-LABEL: name: test_notfirst
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x30000000), %bb.1(0x50000000)
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; CHECK: liveins: $r0, $r1
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; CHECK: renamable $r0, $cpsr = tADDrr killed renamable $r0, renamable $r1, 14 /* CC::al */, $noreg
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; CHECK: renamable $r1 = t2ADDrs renamable $r0, killed renamable $r1, 18, 14 /* CC::al */, $noreg, $noreg
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; CHECK: tCBZ $r0, %bb.2
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; CHECK: bb.1:
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; CHECK: liveins: $r0
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; CHECK: renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from %ir.x)
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; CHECK: tTAILJMPdND @c, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp, implicit killed $r0
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; CHECK: bb.2:
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; CHECK: $r0, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0
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bb.0:
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successors: %bb.1(0x30000000), %bb.2(0x50000000)
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liveins: $r0, $r1
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renamable $r0, $cpsr = tADDrr killed renamable $r0, renamable $r1, 14, $noreg
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tCMPi8 renamable $r0, 0, 14, $noreg, implicit-def $cpsr
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renamable $r1 = t2ADDrs renamable $r0, killed renamable $r1, 18, 14, $noreg, $noreg
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t2Bcc %bb.1, 0, killed $cpsr
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bb.2:
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liveins: $r0
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renamable $r0 = tLDRi killed renamable $r0, 0, 14, $noreg :: (load 4 from %ir.x)
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tTAILJMPdND @c, 14, $noreg, implicit $sp, implicit $sp, implicit killed $r0
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bb.1:
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$r0, dead $cpsr = tMOVi8 0, 14, $noreg
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tBX_RET 14, $noreg, implicit killed $r0
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...
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---
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name: test_redefined
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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; CHECK-LABEL: name: test_redefined
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x30000000), %bb.1(0x50000000)
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; CHECK: liveins: $r0, $r1
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; CHECK: tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
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; CHECK: renamable $r0 = t2ADDrs killed renamable $r0, killed renamable $r1, 18, 14 /* CC::al */, $noreg, $noreg
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; CHECK: tBcc %bb.2, 0 /* CC::eq */, killed $cpsr
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; CHECK: bb.1:
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; CHECK: liveins: $r0
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; CHECK: renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from %ir.x)
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; CHECK: tTAILJMPdND @c, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp, implicit killed $r0
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; CHECK: bb.2:
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; CHECK: $r0, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0
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bb.0:
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successors: %bb.1(0x30000000), %bb.2(0x50000000)
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liveins: $r0, $r1
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tCMPi8 renamable $r0, 0, 14, $noreg, implicit-def $cpsr
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renamable $r0 = t2ADDrs killed renamable $r0, killed renamable $r1, 18, 14, $noreg, $noreg
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t2Bcc %bb.1, 0, killed $cpsr
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bb.2:
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liveins: $r0
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renamable $r0 = tLDRi killed renamable $r0, 0, 14, $noreg :: (load 4 from %ir.x)
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tTAILJMPdND @c, 14, $noreg, implicit $sp, implicit $sp, implicit killed $r0
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bb.1:
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$r0, dead $cpsr = tMOVi8 0, 14, $noreg
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tBX_RET 14, $noreg, implicit killed $r0
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...
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---
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name: test_notredefined
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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; CHECK-LABEL: name: test_notredefined
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x30000000), %bb.1(0x50000000)
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; CHECK: liveins: $r0, $r1
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; CHECK: renamable $r1 = t2ADDrs renamable $r0, killed renamable $r1, 18, 14 /* CC::al */, $noreg, $noreg
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; CHECK: tCBZ $r0, %bb.2
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; CHECK: bb.1:
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; CHECK: liveins: $r0
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; CHECK: renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from %ir.x)
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; CHECK: tTAILJMPdND @c, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp, implicit killed $r0
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; CHECK: bb.2:
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; CHECK: $r0, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0
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bb.0:
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successors: %bb.1(0x30000000), %bb.2(0x50000000)
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liveins: $r0, $r1
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tCMPi8 renamable $r0, 0, 14, $noreg, implicit-def $cpsr
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renamable $r1 = t2ADDrs renamable $r0, killed renamable $r1, 18, 14, $noreg, $noreg
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t2Bcc %bb.1, 0, killed $cpsr
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bb.2:
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liveins: $r0
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renamable $r0 = tLDRi killed renamable $r0, 0, 14, $noreg :: (load 4 from %ir.x)
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tTAILJMPdND @c, 14, $noreg, implicit $sp, implicit $sp, implicit killed $r0
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bb.1:
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$r0, dead $cpsr = tMOVi8 0, 14, $noreg
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tBX_RET 14, $noreg, implicit killed $r0
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...
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---
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name: test_notcmp
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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; CHECK-LABEL: name: test_notcmp
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x30000000), %bb.1(0x50000000)
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; CHECK: liveins: $r0, $r1
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; CHECK: tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
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; CHECK: renamable $r1, $cpsr = tADDrr renamable $r0, killed renamable $r1, 14 /* CC::al */, $noreg
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; CHECK: tBcc %bb.2, 0 /* CC::eq */, killed $cpsr
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; CHECK: bb.1:
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; CHECK: liveins: $r0
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; CHECK: renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from %ir.x)
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; CHECK: tTAILJMPdND @c, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp, implicit killed $r0
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; CHECK: bb.2:
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; CHECK: $r0, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0
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bb.0:
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successors: %bb.1(0x30000000), %bb.2(0x50000000)
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liveins: $r0, $r1
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tCMPi8 renamable $r0, 0, 14, $noreg, implicit-def $cpsr
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renamable $r1, $cpsr = tADDrr renamable $r0, killed renamable $r1, 14, $noreg
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t2Bcc %bb.1, 0, killed $cpsr
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bb.2:
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liveins: $r0
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renamable $r0 = tLDRi killed renamable $r0, 0, 14, $noreg :: (load 4 from %ir.x)
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tTAILJMPdND @c, 14, $noreg, implicit $sp, implicit $sp, implicit killed $r0
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bb.1:
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$r0, dead $cpsr = tMOVi8 0, 14, $noreg
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tBX_RET 14, $noreg, implicit killed $r0
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...
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---
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name: test_killflag_1
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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; CHECK-LABEL: name: test_killflag_1
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x30000000), %bb.1(0x50000000)
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; CHECK: liveins: $r0, $r1
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; CHECK: renamable $r0 = t2ADDrs killed renamable $r0, killed renamable $r0, 18, 14 /* CC::al */, $noreg, $noreg
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; CHECK: tCBZ killed $r1, %bb.2
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; CHECK: bb.1:
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; CHECK: liveins: $r0
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; CHECK: renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from %ir.x)
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; CHECK: tTAILJMPdND @c, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp, implicit killed $r0
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; CHECK: bb.2:
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; CHECK: $r0, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0
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bb.0:
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successors: %bb.1(0x30000000), %bb.2(0x50000000)
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liveins: $r0, $r1
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tCMPi8 killed renamable $r1, 0, 14, $noreg, implicit-def $cpsr
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renamable $r0 = t2ADDrs killed renamable $r0, killed renamable $r0, 18, 14, $noreg, $noreg
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t2Bcc %bb.1, 0, killed $cpsr
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bb.2:
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liveins: $r0
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renamable $r0 = tLDRi killed renamable $r0, 0, 14, $noreg :: (load 4 from %ir.x)
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tTAILJMPdND @c, 14, $noreg, implicit $sp, implicit $sp, implicit killed $r0
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bb.1:
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$r0, dead $cpsr = tMOVi8 0, 14, $noreg
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tBX_RET 14, $noreg, implicit killed $r0
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...
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---
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name: test_killflag_2
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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; CHECK-LABEL: name: test_killflag_2
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x30000000), %bb.1(0x50000000)
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; CHECK: liveins: $r0, $r1
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; CHECK: renamable $r0 = t2ADDrs renamable $r1, killed renamable $r0, 18, 14 /* CC::al */, $noreg, $noreg
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; CHECK: tCBZ killed $r1, %bb.2
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; CHECK: bb.1:
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; CHECK: liveins: $r0
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; CHECK: renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from %ir.x)
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; CHECK: tTAILJMPdND @c, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp, implicit killed $r0
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; CHECK: bb.2:
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; CHECK: $r0, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0
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bb.0:
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successors: %bb.1(0x30000000), %bb.2(0x50000000)
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liveins: $r0, $r1
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tCMPi8 renamable $r1, 0, 14, $noreg, implicit-def $cpsr
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renamable $r0 = t2ADDrs killed renamable $r1, killed renamable $r0, 18, 14, $noreg, $noreg
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t2Bcc %bb.1, 0, killed $cpsr
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bb.2:
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liveins: $r0
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renamable $r0 = tLDRi killed renamable $r0, 0, 14, $noreg :: (load 4 from %ir.x)
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tTAILJMPdND @c, 14, $noreg, implicit $sp, implicit $sp, implicit killed $r0
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bb.1:
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$r0, dead $cpsr = tMOVi8 0, 14, $noreg
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tBX_RET 14, $noreg, implicit killed $r0
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...
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---
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name: test_cpsr
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tracksRegLiveness: true
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liveins:
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- { reg: '$r0', virtual-reg: '' }
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- { reg: '$r1', virtual-reg: '' }
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body: |
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; CHECK-LABEL: name: test_cpsr
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; CHECK: bb.0:
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; CHECK: successors: %bb.2(0x30000000), %bb.1(0x50000000)
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; CHECK: liveins: $r0, $r1
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; CHECK: tCMPi8 renamable $r0, 0, 14 /* CC::al */, $noreg, implicit-def $cpsr
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; CHECK: t2IT 0, 8, implicit-def $itstate
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; CHECK: renamable $r1 = t2ADDri killed renamable $r1, 1, 1 /* CC::ne */, $cpsr, $noreg, implicit killed $itstate
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; CHECK: tBcc %bb.2, 0 /* CC::eq */, killed $cpsr
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; CHECK: bb.1:
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; CHECK: liveins: $r0
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; CHECK: renamable $r0 = tLDRi killed renamable $r0, 0, 14 /* CC::al */, $noreg :: (load 4 from %ir.x)
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; CHECK: tTAILJMPdND @c, 14 /* CC::al */, $noreg, implicit $sp, implicit $sp, implicit killed $r0
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; CHECK: bb.2:
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; CHECK: $r0, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
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; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit killed $r0
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bb.0:
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successors: %bb.1(0x30000000), %bb.2(0x50000000)
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liveins: $r0, $r1
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tCMPi8 renamable $r0, 0, 14, $noreg, implicit-def $cpsr
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t2IT 0, 8, implicit-def $itstate
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renamable $r1 = t2ADDri killed renamable $r1, 1, 1, $cpsr, $noreg, implicit killed $itstate
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t2Bcc %bb.1, 0, killed $cpsr
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bb.2:
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liveins: $r0
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renamable $r0 = tLDRi killed renamable $r0, 0, 14, $noreg :: (load 4 from %ir.x)
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tTAILJMPdND @c, 14, $noreg, implicit $sp, implicit $sp, implicit killed $r0
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bb.1:
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$r0, dead $cpsr = tMOVi8 0, 14, $noreg
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tBX_RET 14, $noreg, implicit killed $r0
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...
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