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582ae3d23e
CorrectExtraCFGEdges function. The latter was a workaround for "Various pieces of code" leaving bogus extra CFG edges in place. Where by "various" it meant only IfConverter::MergeBlocks, which failed to clear all of the successors of dead blocks it emptied out. This wouldn't matter a whole lot, except that the dead blocks remained listed as predecessors of still-useful blocks, inhibiting optimizations. This fix slightly changed two thumb tests, because the correct CFG successors allowed for the "diamond" if-conversion pattern to be detected, when it could only use "simple" before. Additionally, the removal of a now-redundant call to analyzeBranch (with AllowModify=true) in BranchFolder::OptimizeFunction caused a later check for an empty block in BranchFolder::OptimizeBlock to fail. Correct this by moving the call to analyzeBranch in OptimizeBlock higher. Differential Revision: https://reviews.llvm.org/D79527
130 lines
4.2 KiB
LLVM
130 lines
4.2 KiB
LLVM
; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s
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; RUN: llc < %s -mtriple=thumbv7-apple-darwin -arm-default-it | FileCheck %s
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; RUN: llc < %s -mtriple=thumbv8 -arm-no-restrict-it | FileCheck %s
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; RUN: llc < %s -mtriple=thumbv8 -arm-no-restrict-it -enable-tail-merge=0 | FileCheck %s
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define i32 @t1(i32 %a, i32 %b, i32 %c, i32 %d) nounwind {
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; CHECK-LABEL: t1:
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; CHECK: ittee ne
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; CHECK: cmpne
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; CHECK: addne
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; CHECK: addeq
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; CHECK: addeq
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; CHECK: bx lr
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switch i32 %c, label %cond_next [
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i32 1, label %cond_true
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i32 7, label %cond_true
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]
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cond_true:
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%tmp12 = add i32 %a, 1
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%tmp1518 = add i32 %tmp12, %b
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ret i32 %tmp1518
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cond_next:
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%tmp15 = add i32 %b, %a
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ret i32 %tmp15
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}
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define i32 @t2(i32 %a, i32 %b) nounwind {
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entry:
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; CHECK-LABEL: t2:
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; CHECK: ite {{gt|le}}
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; CHECK-DAG: suble
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; CHECK-DAG: subgt
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%tmp1434 = icmp eq i32 %a, %b ; <i1> [#uses=1]
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br i1 %tmp1434, label %bb17, label %bb.outer
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bb.outer: ; preds = %cond_false, %entry
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%b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5]
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%a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]
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br label %bb
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bb: ; preds = %cond_true, %bb.outer
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%indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
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%tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1]
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%tmp.40 = mul i32 %indvar, %tmp. ; <i32> [#uses=1]
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%a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph ; <i32> [#uses=6]
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%tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1]
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br i1 %tmp3, label %cond_true, label %cond_false
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cond_true: ; preds = %bb
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%tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2]
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%tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1]
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%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
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br i1 %tmp1437, label %bb17, label %bb
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cond_false: ; preds = %bb
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%tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2]
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%tmp14 = icmp eq i32 %a_addr.026.0, %tmp10 ; <i1> [#uses=1]
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br i1 %tmp14, label %bb17, label %bb.outer
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bb17: ; preds = %cond_false, %cond_true, %entry
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%a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]
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ret i32 %a_addr.026.1
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}
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define i32 @t2_nomerge(i32 %a, i32 %b) nounwind {
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entry:
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; CHECK-LABEL: t2_nomerge:
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; CHECK-NOT: ite {{gt|le}}
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; CHECK-NOT: suble
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; CHECK-NOT: subgt
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%tmp1434 = icmp eq i32 %a, %b ; <i1> [#uses=1]
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br i1 %tmp1434, label %bb17, label %bb.outer
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bb.outer: ; preds = %cond_false, %entry
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%b_addr.021.0.ph = phi i32 [ %b, %entry ], [ %tmp10, %cond_false ] ; <i32> [#uses=5]
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%a_addr.026.0.ph = phi i32 [ %a, %entry ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]
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br label %bb
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bb: ; preds = %cond_true, %bb.outer
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%indvar = phi i32 [ 0, %bb.outer ], [ %indvar.next, %cond_true ] ; <i32> [#uses=2]
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%tmp. = sub i32 0, %b_addr.021.0.ph ; <i32> [#uses=1]
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%tmp.40 = mul i32 %indvar, %tmp. ; <i32> [#uses=1]
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%a_addr.026.0 = add i32 %tmp.40, %a_addr.026.0.ph ; <i32> [#uses=6]
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%tmp3 = icmp sgt i32 %a_addr.026.0, %b_addr.021.0.ph ; <i1> [#uses=1]
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br i1 %tmp3, label %cond_true, label %cond_false
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cond_true: ; preds = %bb
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%tmp7 = sub i32 %a_addr.026.0, %b_addr.021.0.ph ; <i32> [#uses=2]
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%tmp1437 = icmp eq i32 %tmp7, %b_addr.021.0.ph ; <i1> [#uses=1]
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%indvar.next = add i32 %indvar, 1 ; <i32> [#uses=1]
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br i1 %tmp1437, label %bb17, label %bb
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cond_false: ; preds = %bb
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%tmp10 = sub i32 %b_addr.021.0.ph, %a_addr.026.0 ; <i32> [#uses=2]
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%tmp14 = icmp eq i32 %b_addr.021.0.ph, %tmp10 ; <i1> [#uses=1]
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br i1 %tmp14, label %bb17, label %bb.outer
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bb17: ; preds = %cond_false, %cond_true, %entry
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%a_addr.026.1 = phi i32 [ %a, %entry ], [ %tmp7, %cond_true ], [ %a_addr.026.0, %cond_false ] ; <i32> [#uses=1]
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ret i32 %a_addr.026.1
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}
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@x = external global i32* ; <i32**> [#uses=1]
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define void @foo(i32 %a) nounwind {
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entry:
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%tmp = load i32*, i32** @x ; <i32*> [#uses=1]
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store i32 %a, i32* %tmp
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ret void
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}
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define void @t3(i32 %a, i32 %b) nounwind {
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entry:
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; CHECK-LABEL: t3:
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; CHECK: it lt
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; CHECK-NEXT: bxlt lr
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; CHECK: mov r0, r1
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; CHECK: bl {{_?}}foo
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%tmp1 = icmp sgt i32 %a, 10 ; <i1> [#uses=1]
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br i1 %tmp1, label %cond_true, label %UnifiedReturnBlock
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cond_true: ; preds = %entry
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call void @foo( i32 %b )
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ret void
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UnifiedReturnBlock: ; preds = %entry
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ret void
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}
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