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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-01 00:12:50 +01:00
llvm-mirror/test/MC/Disassembler
Jim Grosbach 1699d40f80 Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern
and handle the operand explicitly. Flesh out encoding information. Add an
explicit disassembler testcase for the instruction.

llvm-svn: 116432
2010-10-13 21:00:04 +00:00
..
arm-tests.txt Refactor the ARM 'setend' instruction pattern. Use a single instruction pattern 2010-10-13 21:00:04 +00:00
dg.exp
neon-tests.txt Fix vmov.f64 disassembly on targets where sizeof(long) != 8. 2010-09-17 23:48:07 +00:00
simple-tests.txt Added a testcase for the ENTER instruction. 2010-10-05 00:21:40 +00:00
thumb-tests.txt Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoid 2010-08-17 17:23:19 +00:00