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llvm-mirror/include/llvm/CodeGen
David Green 6a316cf978 [ISel] Port AArch64 SABD and UABD to DAGCombine
This ports the AArch64 SABD and USBD over to DAG Combine, where they can be
used by more backends (notably MVE in a follow-up patch). The matching code
has changed very little, just to handle legal operations and types
differently. It selects from (ABS (SUB (EXTEND a), (EXTEND b))), producing
a ubds/abdu which is zexted to the original type.

Differential Revision: https://reviews.llvm.org/D91937
2021-06-26 19:34:16 +01:00
..
GlobalISel Revert "[GlobalISel] NFC: Have LLT::getSizeInBits/Bytes return a TypeSize." 2021-06-25 17:37:16 +01:00
MIRParser
PBQP
AccelTable.h
Analysis.h
AntiDepBreaker.h
AsmPrinter.h
AsmPrinterHandler.h
AtomicExpandUtils.h
BasicBlockSectionUtils.h
BasicTTIImpl.h [CostModel] Return Invalid cost in getArithmeticCost instead of crashing for scalable vectors. 2021-06-07 17:26:23 +01:00
CalcSpillWeights.h
CallingConvLower.h
CodeGenPassBuilder.h
CommandFlags.h
CostTable.h
CSEConfigBase.h
DAGCombine.h
DbgEntityHistoryCalculator.h
DebugHandlerBase.h
DFAPacketizer.h
DIE.h
DIEValue.def
DwarfStringPoolEntry.h
EdgeBundles.h
ExecutionDomainFix.h
ExpandReductions.h
ExpandVectorPredication.h
FastISel.h
FaultMaps.h
FunctionLoweringInfo.h
GCMetadata.h
GCMetadataPrinter.h
IndirectThunks.h
IntrinsicLowering.h
ISDOpcodes.h [ISel] Port AArch64 SABD and UABD to DAGCombine 2021-06-26 19:34:16 +01:00
LatencyPriorityQueue.h
LazyMachineBlockFrequencyInfo.h
LexicalScopes.h
LinkAllAsmWriterComponents.h
LinkAllCodegenComponents.h
LiveInterval.h
LiveIntervalCalc.h [NFC] Fix typo 2021-06-21 14:59:30 +02:00
LiveIntervals.h
LiveIntervalUnion.h
LivePhysRegs.h
LiveRangeCalc.h
LiveRangeEdit.h
LiveRegMatrix.h
LiveRegUnits.h
LiveStacks.h
LiveVariables.h
LoopTraversal.h
LowLevelType.h
MachineBasicBlock.h [CSSPGO] Undoing the concept of dangling pseudo probe 2021-06-18 15:14:11 -07:00
MachineBlockFrequencyInfo.h
MachineBranchProbabilityInfo.h
MachineCombinerPattern.h
MachineConstantPool.h
MachineDominanceFrontier.h
MachineDominators.h
MachineFrameInfo.h [llvm] fix typo in comment 2021-06-17 14:30:52 +00:00
MachineFunction.h CodeGen: Fix missing const 2021-06-11 13:45:24 -04:00
MachineFunctionPass.h
MachineInstr.h [DebugInstrRef][1/3] Track PHI values through register allocation 2021-05-26 20:24:00 +01:00
MachineInstrBuilder.h
MachineInstrBundle.h
MachineInstrBundleIterator.h
MachineJumpTableInfo.h
MachineLoopInfo.h
MachineLoopUtils.h
MachineMemOperand.h Rename MachineMemOperand::getOrdering -> getSuccessOrdering. 2021-06-21 16:49:27 -07:00
MachineModuleInfo.h
MachineModuleInfoImpls.h
MachineModuleSlotTracker.h [MIRPrinter] Add machine metadata support. 2021-06-19 12:48:08 -04:00
MachineOperand.h
MachineOptimizationRemarkEmitter.h
MachineOutliner.h
MachinePassManager.h
MachinePassRegistry.def
MachinePassRegistry.h
MachinePipeliner.h
MachinePostDominators.h
MachineRegionInfo.h
MachineRegisterInfo.h [AIX][XCOFF] emit vector info of traceback table. 2021-06-14 11:15:22 -04:00
MachineScheduler.h
MachineSizeOpts.h
MachineSSAUpdater.h
MachineStableHash.h
MachineTraceMetrics.h
MachORelocation.h
MacroFusion.h
MBFIWrapper.h [NFC] Add missing includes for LLVM_ENABLE_MODULES builds 2021-06-03 23:29:03 +02:00
MIRFormatter.h
MIRFSDiscriminator.h [SampleFDO] New hierarchical discriminator for FS SampleFDO (ProfileData part) 2021-06-02 10:32:52 -07:00
MIRPrinter.h
MIRYamlMapping.h [MIRPrinter] Add machine metadata support. 2021-06-19 12:48:08 -04:00
ModuloSchedule.h
MultiHazardRecognizer.h
NonRelocatableStringpool.h
ParallelCG.h
Passes.h [SampleFDO] New hierarchical discriminator for FS SampleFDO (ProfileData part) 2021-06-02 10:32:52 -07:00
PBQPRAConstraint.h
PreISelIntrinsicLowering.h
PseudoSourceValue.h
RDFGraph.h
RDFLiveness.h
RDFRegisters.h
ReachingDefAnalysis.h
RegAllocPBQP.h
RegAllocRegistry.h
Register.h
RegisterClassInfo.h
RegisterPressure.h
RegisterScavenging.h
RegisterUsageInfo.h
ReplaceWithVeclib.h
ResourcePriorityQueue.h
RuntimeLibcalls.h [CodeGen] Refactor libcall lookups for RTLIB::POWI_* 2021-06-02 11:40:34 +02:00
ScheduleDAG.h
ScheduleDAGInstrs.h
ScheduleDAGMutation.h
ScheduleDFS.h
ScheduleHazardRecognizer.h
SchedulerRegistry.h
ScoreboardHazardRecognizer.h
SDNodeProperties.td
SelectionDAG.h
SelectionDAGAddressAnalysis.h
SelectionDAGISel.h
SelectionDAGNodes.h Rename MachineMemOperand::getOrdering -> getSuccessOrdering. 2021-06-21 16:49:27 -07:00
SelectionDAGTargetInfo.h
SlotIndexes.h
Spiller.h
StableHashing.h
StackMaps.h
StackProtector.h
SwiftErrorValueTracking.h
SwitchLoweringUtils.h
TailDuplicator.h
TargetCallingConv.h
TargetFrameLowering.h [CodeGen][NFC] Remove unused virtual function 2021-06-02 13:11:12 -07:00
TargetInstrInfo.h Revert "[X86FixupLEAs] Transform the sequence LEA/SUB to SUB/SUB" 2021-06-12 11:41:38 +01:00
TargetLowering.h [llvm][AArch64] Handle arrays of struct properly (from IR) 2021-06-16 13:56:01 +00:00
TargetLoweringObjectFileImpl.h [AIX] Add traceback ssp canary bit support 2021-06-10 02:40:02 +00:00
TargetOpcodes.h
TargetPassConfig.h
TargetRegisterInfo.h
TargetSchedule.h
TargetSubtargetInfo.h
TileShapeInfo.h
UnreachableBlockElim.h
ValueTypes.h Revert "Implementation of global.get/set for reftypes in LLVM IR" 2021-06-10 10:11:17 +00:00
ValueTypes.td [ValueTypes] Define MVTs for v3i64/v3f64 to complement v6i32/v6f32 2021-06-24 12:41:22 +09:00
VirtRegMap.h
WasmEHFuncInfo.h [WebAssembly] Rename event to tag 2021-06-17 20:34:19 -07:00
WinEHFuncInfo.h