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d72dcacf0e
This patch: - makes nodes ISD::ADDCARRY and ISD::SUBCARRY legal for i32 - lowering is done by first converting the boolean value into the carry flag using (_, C) <- (ARMISD::ADDC R, -1) and converted back to an integer value using (R, _) <- (ARMISD::ADDE 0, 0, C). An ARMISD::ADDE between the two operations does the actual addition. - for subtraction, given that ISD::SUBCARRY second result is actually a borrow, we need to invert the value of the second operand and result before and after using ARMISD::SUBE. We need to invert the carry result of ARMISD::SUBE to preserve the semantics. - given that the generic combiner may lower ISD::ADDCARRY and ISD::SUBCARRY into ISD::UADDO and ISD::USUBO we need to update their lowering as well otherwise i64 operations now would require branches. This implies updating the corresponding test for unsigned. - add new combiner to remove the redundant conversions from/to carry flags to/from boolean values (ARMISD::ADDC (ARMISD::ADDE 0, 0, C), -1) -> C Differential Revision: https://reviews.llvm.org/D35192 llvm-svn: 309923 |
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AArch64 | ||
AMDGPU | ||
ARM | ||
AVR | ||
BPF | ||
Generic | ||
Hexagon | ||
Inputs | ||
Lanai | ||
Mips | ||
MIR | ||
MSP430 | ||
Nios2 | ||
NVPTX | ||
PowerPC | ||
SPARC | ||
SystemZ | ||
Thumb | ||
Thumb2 | ||
WebAssembly | ||
WinEH | ||
X86 | ||
XCore |