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224192bde8
This patch makes one change to GOT handling and two changes to N64's relocation model handling. Furthermore, the jumptable encodings have been corrected for static N64. Big GOT handling is now done via a new SDNode MipsGotHi - this node is unconditionally lowered to an lui instruction. The first change to N64's relocation handling is the lifting of the restriction that N64 always uses PIC. Now it is possible to target static environments. The second change adds support for 64 bit symbols and enables them by default. Previously N64 had patterns for sym32 mode only. In this mode all symbols are assumed to have 32 bit addresses. sym32 mode support is selectable with attribute 'sym32'. A follow on patch for clang will add the necessary frontend parameter. This partially resolves PR/23485. Thanks to Brooks Davis for reporting the issue! This version corrects a "Conditional jump or move depends on uninitialised value(s)" error detected by valgrind present in the original commit. Reviewers: dsanders, seanbruno, zoran.jovanovic, vkalintiris Differential Revision: https://reviews.llvm.org/D23652 llvm-svn: 293279
162 lines
7.1 KiB
LLVM
162 lines
7.1 KiB
LLVM
; RUN: llc -march=mips -relocation-model=static < %s | FileCheck --check-prefixes=ALL,SYM32,O32,O32BE %s
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; RUN: llc -march=mipsel -relocation-model=static < %s | FileCheck --check-prefixes=ALL,SYM32,O32,O32LE %s
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; RUN-TODO: llc -march=mips64 -relocation-model=static -target-abi o32 < %s | FileCheck --check-prefixes=ALL,SYM32,O32 %s
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; RUN-TODO: llc -march=mips64el -relocation-model=static -target-abi o32 < %s | FileCheck --check-prefixes=ALL,SYM32,O32 %s
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; RUN: llc -march=mips64 -relocation-model=static -target-abi n32 < %s | FileCheck --check-prefixes=ALL,SYM32,N32,NEW,NEWBE %s
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; RUN: llc -march=mips64el -relocation-model=static -target-abi n32 < %s | FileCheck --check-prefixes=ALL,SYM32,N32,NEW,NEWLE %s
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; RUN: llc -march=mips64 -relocation-model=static -target-abi n64 < %s | FileCheck --check-prefixes=ALL,SYM64,N64,NEW,NEWBE %s
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; RUN: llc -march=mips64el -relocation-model=static -target-abi n64 < %s | FileCheck --check-prefixes=ALL,SYM64,N64,NEW,NEWLE %s
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; Test the effect of varargs on floating point types in the non-variable part
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; of the argument list as specified by section 2 of the MIPSpro N32 Handbook.
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;
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; N32/N64 are almost identical in this area so many of their checks have been
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; combined into the 'NEW' prefix (the N stands for New).
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;
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; On O32, varargs prevents all FPU argument register usage. This contradicts
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; the N32 handbook, but agrees with the SYSV ABI and GCC's behaviour.
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@floats = global [11 x float] zeroinitializer
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@doubles = global [11 x double] zeroinitializer
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define void @double_args(double %a, ...)
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nounwind {
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entry:
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%0 = getelementptr [11 x double], [11 x double]* @doubles, i32 0, i32 1
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store volatile double %a, double* %0
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%ap = alloca i8*
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%ap2 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap2)
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%b = va_arg i8** %ap, double
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%1 = getelementptr [11 x double], [11 x double]* @doubles, i32 0, i32 2
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store volatile double %b, double* %1
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call void @llvm.va_end(i8* %ap2)
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ret void
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}
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; ALL-LABEL: double_args:
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; We won't test the way the global address is calculated in this test. This is
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; just to get the register number for the other checks.
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; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
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; SYM64-DAG: daddiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)
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; O32 forbids using floating point registers for the non-variable portion.
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; N32/N64 allow it.
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; O32BE-DAG: mtc1 $5, [[FTMP1:\$f[0-9]*[02468]+]]
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; O32BE-DAG: mtc1 $4, [[FTMP2:\$f[0-9]*[13579]+]]
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; O32LE-DAG: mtc1 $4, [[FTMP1:\$f[0-9]*[02468]+]]
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; O32LE-DAG: mtc1 $5, [[FTMP2:\$f[0-9]*[13579]+]]
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; O32-DAG: sdc1 [[FTMP1]], 8([[R2]])
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; NEW-DAG: sdc1 $f12, 8([[R2]])
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; The varargs portion is dumped to stack
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; O32-DAG: sw $6, 16($sp)
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; O32-DAG: sw $7, 20($sp)
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; NEW-DAG: sd $5, 8($sp)
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; NEW-DAG: sd $6, 16($sp)
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; NEW-DAG: sd $7, 24($sp)
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; NEW-DAG: sd $8, 32($sp)
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; NEW-DAG: sd $9, 40($sp)
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; NEW-DAG: sd $10, 48($sp)
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; NEW-DAG: sd $11, 56($sp)
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; Get the varargs pointer
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; O32 has 4 bytes padding, 4 bytes for the varargs pointer, and 8 bytes reserved
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; for arguments 1 and 2.
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; N32/N64 has 8 bytes for the varargs pointer, and no reserved area.
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; O32-DAG: addiu [[VAPTR:\$[0-9]+]], $sp, 16
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; O32-DAG: sw [[VAPTR]], 4($sp)
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; N32-DAG: addiu [[VAPTR:\$[0-9]+]], $sp, 8
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; N32-DAG: sw [[VAPTR]], 4($sp)
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; N64-DAG: daddiu [[VAPTR:\$[0-9]+]], $sp, 8
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; N64-DAG: sd [[VAPTR]], 0($sp)
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; Increment the pointer then get the varargs arg
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; LLVM will rebind the load to the stack pointer instead of the varargs pointer
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; during lowering. This is fine and doesn't change the behaviour.
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; O32-DAG: addiu [[VAPTR]], [[VAPTR]], 8
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; O32-DAG: sw [[VAPTR]], 4($sp)
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; N32-DAG: addiu [[VAPTR]], [[VAPTR]], 8
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; N32-DAG: sw [[VAPTR]], 4($sp)
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; N64-DAG: daddiu [[VAPTR]], [[VAPTR]], 8
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; N64-DAG: sd [[VAPTR]], 0($sp)
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; O32-DAG: ldc1 [[FTMP1:\$f[0-9]+]], 16($sp)
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; NEW-DAG: ldc1 [[FTMP1:\$f[0-9]+]], 8($sp)
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; ALL-DAG: sdc1 [[FTMP1]], 16([[R2]])
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define void @float_args(float %a, ...) nounwind {
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entry:
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%0 = getelementptr [11 x float], [11 x float]* @floats, i32 0, i32 1
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store volatile float %a, float* %0
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%ap = alloca i8*
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%ap2 = bitcast i8** %ap to i8*
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call void @llvm.va_start(i8* %ap2)
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%b = va_arg i8** %ap, float
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%1 = getelementptr [11 x float], [11 x float]* @floats, i32 0, i32 2
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store volatile float %b, float* %1
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call void @llvm.va_end(i8* %ap2)
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ret void
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}
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; ALL-LABEL: float_args:
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; We won't test the way the global address is calculated in this test. This is
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; just to get the register number for the other checks.
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; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
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; SYM64-DAG: daddiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)
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; The first four arguments are the same in O32/N32/N64.
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; The non-variable portion should be unaffected.
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; O32-DAG: sw $4, 4([[R2]])
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; NEW-DAG: swc1 $f12, 4([[R2]])
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; The varargs portion is dumped to stack
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; O32-DAG: sw $5, 12($sp)
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; O32-DAG: sw $6, 16($sp)
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; O32-DAG: sw $7, 20($sp)
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; NEW-DAG: sd $5, 8($sp)
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; NEW-DAG: sd $6, 16($sp)
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; NEW-DAG: sd $7, 24($sp)
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; NEW-DAG: sd $8, 32($sp)
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; NEW-DAG: sd $9, 40($sp)
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; NEW-DAG: sd $10, 48($sp)
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; NEW-DAG: sd $11, 56($sp)
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; Get the varargs pointer
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; O32 has 4 bytes padding, 4 bytes for the varargs pointer, and should have 8
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; bytes reserved for arguments 1 and 2 (the first float arg) but as discussed in
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; arguments-float.ll, GCC doesn't agree with MD00305 and treats floats as 4
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; bytes so we only have 12 bytes total.
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; N32/N64 has 8 bytes for the varargs pointer, and no reserved area.
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; O32-DAG: addiu [[VAPTR:\$[0-9]+]], $sp, 12
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; O32-DAG: sw [[VAPTR]], 4($sp)
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; N32-DAG: addiu [[VAPTR:\$[0-9]+]], $sp, 8
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; N32-DAG: sw [[VAPTR]], 4($sp)
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; N64-DAG: daddiu [[VAPTR:\$[0-9]+]], $sp, 8
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; N64-DAG: sd [[VAPTR]], 0($sp)
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; Increment the pointer then get the varargs arg
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; LLVM will rebind the load to the stack pointer instead of the varargs pointer
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; during lowering. This is fine and doesn't change the behaviour.
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; Also, in big-endian mode the offset must be increased by 4 to retrieve the
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; correct half of the argument slot.
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;
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; O32-DAG: addiu [[VAPTR]], [[VAPTR]], 4
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; O32-DAG: sw [[VAPTR]], 4($sp)
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; N32-DAG: addiu [[VAPTR]], [[VAPTR]], 8
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; N32-DAG: sw [[VAPTR]], 4($sp)
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; N64-DAG: daddiu [[VAPTR]], [[VAPTR]], 8
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; N64-DAG: sd [[VAPTR]], 0($sp)
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; O32-DAG: lwc1 [[FTMP1:\$f[0-9]+]], 12($sp)
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; NEWLE-DAG: lwc1 [[FTMP1:\$f[0-9]+]], 8($sp)
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; NEWBE-DAG: lwc1 [[FTMP1:\$f[0-9]+]], 12($sp)
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; ALL-DAG: swc1 [[FTMP1]], 8([[R2]])
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declare void @llvm.va_start(i8*)
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declare void @llvm.va_copy(i8*, i8*)
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declare void @llvm.va_end(i8*)
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