Akira Hatanaka 66dcf905b6 [mips] Print instructions "beq", "bne" and "or" using assembler pseudo ... instructions "beqz", "bnez" and "move", when possible. beq $2, $zero, $L1 => beqz $2, $L1 bne $2, $zero, $L1 => bnez $2, $L1 or $2, $3, $zero => move $2, $3 llvm-svn: 187229		2013-07-26 18:34:25 +00:00
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AArch64	AArch64: add llc-based tests for previous commit.	2013-07-25 16:23:55 +00:00
ARM	Debug Info: improve the verifier to check field types.	2013-07-25 19:33:30 +00:00
CPP
Generic
Hexagon	Debug Info: improve the verifier to check field types.	2013-07-25 19:33:30 +00:00
Inputs	Debug Info: improve the verifier to check field types.	2013-07-25 19:33:30 +00:00
Mips	[mips] Print instructions "beq", "bne" and "or" using assembler pseudo	2013-07-26 18:34:25 +00:00
MSP430	Use conventional syntax for branches.	2013-07-14 18:19:44 +00:00
NVPTX	Add a target legalize hook for SplitVectorOperand (again)	2013-07-26 13:28:29 +00:00
PowerPC	PPC32 va_list is an actual structure so va_copy needs to copy the whole	2013-07-25 21:36:47 +00:00
R600	DAGCombiner: Pass the correct type to TargetLowering::isF(Abs|Neg)Free	2013-07-23 23:55:03 +00:00
SI
SPARC	Allocate local registers in order for optimal coloring.	2013-07-25 18:35:14 +00:00
SystemZ	[SystemZ] Rework compare and branch support	2013-07-25 09:34:38 +00:00
Thumb	Debug Info: improve the verifier to check field types.	2013-07-25 19:33:30 +00:00
Thumb2	Refactor AnalyzeBranch on ARM. The previous version did not always analyze	2013-07-19 23:52:47 +00:00
X86	Add a target legalize hook for SplitVectorOperand (again)	2013-07-26 13:28:29 +00:00
XCore	Disambiguate function names in some CodeGen tests. (Some tests were using function names that also were names of instructions and/or doing other unusual things that were making the test not amenable to otherwise scriptable pattern matching.) No functionality change.	2013-07-18 22:29:15 +00:00