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e023b2c5fa
In the past while, I've committed a number of patches in the PowerPC back end aimed at eliminating comparison instructions. However, this causes some failures in proprietary source and these issues are not observed in SPEC or any open source packages I've been able to run. As a result, I'm pulling the entire series and will refactor it to: - Have a single entry point for easy control - Have fine-grained control over which patterns we transform A side-effect of this is that test cases for these patches (and modified by them) are XFAIL-ed. This is a temporary measure as it is counter-productive to remove/modify these test cases and then have to modify them again when the refactored patch is recommitted. The failure will be investigated in parallel to the refactoring effort and the recommit will either have a fix for it or will leave this transformation off by default until the problem is resolved. llvm-svn: 314244
54 lines
1.6 KiB
LLVM
54 lines
1.6 KiB
LLVM
; XFAIL: *
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-gen-isel=false < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Function Attrs: nounwind readnone
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define signext i32 @crbitsoff(i32 signext %v1, i32 signext %v2) #0 {
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entry:
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%tobool = icmp ne i32 %v1, 0
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%lnot = icmp eq i32 %v2, 0
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%and3 = and i1 %tobool, %lnot
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%and = zext i1 %and3 to i32
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ret i32 %and
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; CHECK-LABEL: @crbitsoff
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; CHECK-NO-ISEL-LABEL: @crbitsoff
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; CHECK-DAG: cmplwi {{[0-9]+}}, 3, 0
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; CHECK-DAG: li [[REG2:[0-9]+]], 1
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; CHECK-DAG: cntlzw [[REG3:[0-9]+]],
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; CHECK: isel [[REG4:[0-9]+]], 0, [[REG2]]
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; CHECK-NO-ISEL: bc 12, 2, [[TRUE:.LBB[0-9]+]]
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; CHECK-NO-ISEL: ori 4, 5, 0
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; CHECK-NO-ISEL-NEXT: b [[SUCCESSOR:.LBB[0-9]+]]
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; CHECK-NO-ISEL: [[TRUE]]
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; CHECK-NO-ISEL-NEXT: addi 4, 0, 0
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; CHECK: and 3, [[REG4]], [[REG3]]
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; CHECK: blr
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}
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define signext i32 @crbitson(i32 signext %v1, i32 signext %v2) #1 {
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entry:
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%tobool = icmp ne i32 %v1, 0
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%lnot = icmp eq i32 %v2, 0
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%and3 = and i1 %tobool, %lnot
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%and = zext i1 %and3 to i32
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ret i32 %and
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; CHECK-LABEL: @crbitson
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; CHECK-NO-ISEL-LABEL: @crbitson
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; CHECK-DAG: cntlzw [[REG1:[0-9]+]], 3
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; CHECK-DAG: cntlzw [[REG2:[0-9]+]], 4
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; CHECK: srwi [[REG3:[0-9]+]], [[REG1]], 5
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; CHECK: srwi [[REG4:[0-9]+]], [[REG2]], 5
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; CHECK: xori [[REG5:[0-9]+]], [[REG3]], 1
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; CHECK: and 3, [[REG5]], [[REG4]]
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; CHECK-NEXT: blr
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}
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attributes #0 = { nounwind readnone "target-features"="-crbits" }
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attributes #1 = { nounwind readnone }
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