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8b112ee806
Summary: When identifing instructions that can be folded into a MOVCC instruction, checking for a predicate operand is not enough, also need to check for thumb2 function, with restrict-IT, is the machine instruction eligible for ARMv8 IT or not. Notes in ARMv8-A Architecture Reference Manual, section "Partial deprecation of IT" https://usermanual.wiki/Pdf/ARM20Architecture20Reference20ManualARMv8.1667877052.pdf "ARMv8-A deprecates some uses of the T32 IT instruction. All uses of IT that apply to instructions other than a single subsequent 16-bit instruction from a restricted set are deprecated, as are explicit references to the PC within that single 16-bit instruction. This permits the non-deprecated forms of IT and subsequent instructions to be treated as a single 32-bit conditional instruction." Reviewers: efriedma, lebedev.ri, t.p.northover, jmolloy, aemerson, compnerd, stoklund, ostannard Reviewed By: ostannard Subscribers: ostannard, javed.absar, kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D63474 llvm-svn: 363739
25 lines
640 B
LLVM
25 lines
640 B
LLVM
; RUN: llc -mtriple thumbv7-eabi -arm-restrict-it -filetype asm -o - %s \
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; RUN: | FileCheck %s
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define arm_aapcscc i32 @function(i32 %i, i32 %j) {
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entry:
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%cmp = icmp eq i32 %i, %j
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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%mul = mul nsw i32 %i, %i
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br label %if.end
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if.end: ; preds = %if.then, %entry
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%i.addr.0 = phi i32 [ %mul, %if.then ], [ %i, %entry ]
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ret i32 %i.addr.0
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}
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; CHECK-LABEL: function
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; CHECK: mul r2, r0, r0
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; CHECK: cmp r0, r1
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; CHECK-NOT: mulseq r0, r0, r0
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; CHECK: moveq r0, r2
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; CHECK: bx lr
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