mirror of
https://github.com/RPCS3/llvm-mirror.git
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e09ac70bb3
This adds a new flag -lsr-preferred-addressing-mode to override the target's preferred addressing mode. It replaces flag -lsr-backedge-indexing, which is equivalent to preindexed addressing that is one of the options that -lsr-preferred-addressing-mode accepts. Differential Revision: https://reviews.llvm.org/D96855
322 lines
11 KiB
LLVM
322 lines
11 KiB
LLVM
; RUN: llc -mtriple=thumbv7em -mattr=+fp-armv8 %s -o - | \
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; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT
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; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp %s -o - | \
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; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-DEFAULT
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; -lsr-backedge-indexing=false
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; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -lsr-preferred-addressing-mode=postindexed %s -o - | \
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; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED
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; RUN: llc -mtriple=thumbv8 %s -o - | \
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; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED
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; RUN: llc -mtriple=thumbv8m.main -mattr=+fp-armv8,+dsp -lsr-complexity-limit=2147483647 %s -o - | \
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; RUN: FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-COMPLEX
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; CHECK-LABEL: test_qadd_2
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; CHECK: @ %loop
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; CHECK-DEFAULT: ldr{{.*}}, #4]
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; CHECK-DEFAULT: ldr{{.*}}, #4]
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; CHECK-DEFAULT: str{{.*}}, #4]
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; CHECK-DEFAULT: ldr{{.*}}, #8]!
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; CHECK-DEAFULT: ldr{{.*}}, #8]!
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; CHECK-DEFAULT: str{{.*}}, #8]!
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; CHECK-COMPLEX: ldr{{.*}}, #8]!
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; CHECK-COMPLEX: ldr{{.*}}, #8]!
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; CHECK-COMPLEX: str{{.*}}, #8]!
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; CHECK-COMPLEX: ldr{{.*}}, #4]
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; CHECK-COMPLEX: ldr{{.*}}, #4]
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; CHECK-COMPLEX: str{{.*}}, #4]
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; DISABLED-NOT: ldr{{.*}}]!
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; DISABLED-NOT: str{{.*}}]!
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define void @test_qadd_2(i32* %a.array, i32* %b.array, i32* %out.array, i32 %N) {
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entry:
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br label %loop
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loop:
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%i = phi i32 [ 0, %entry ], [ %i.next, %loop ]
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%idx.1 = phi i32 [ 0, %entry ], [ %idx.next, %loop ]
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%gep.a.1 = getelementptr inbounds i32, i32* %a.array, i32 %idx.1
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%a.1 = load i32, i32* %gep.a.1
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%gep.b.1 = getelementptr inbounds i32, i32* %b.array, i32 %idx.1
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%b.1 = load i32, i32* %gep.b.1
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%qadd.1 = call i32 @llvm.arm.qadd(i32 %a.1, i32 %b.1)
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%addr.1 = getelementptr inbounds i32, i32* %out.array, i32 %idx.1
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store i32 %qadd.1, i32* %addr.1
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%idx.2 = or i32 %idx.1, 1
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%gep.a.2 = getelementptr inbounds i32, i32* %a.array, i32 %idx.2
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%a.2 = load i32, i32* %gep.a.2
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%gep.b.2 = getelementptr inbounds i32, i32* %b.array, i32 %idx.2
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%b.2 = load i32, i32* %gep.b.2
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%qadd.2 = call i32 @llvm.arm.qadd(i32 %a.2, i32 %b.2)
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%addr.2 = getelementptr inbounds i32, i32* %out.array, i32 %idx.2
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store i32 %qadd.2, i32* %addr.2
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%i.next = add nsw nuw i32 %i, -2
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%idx.next = add nsw nuw i32 %idx.1, 2
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%cmp = icmp ult i32 %i.next, %N
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br i1 %cmp, label %loop, label %exit
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exit:
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ret void
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}
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; CHECK-LABEL: test_qadd_2_backwards
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; TODO: Indexes should be generated.
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; CHECK: @ %loop
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; CHECK-DEFAULT: ldr{{.*}},
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; CHECK-DEFAULT: ldr{{.*}},
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; CHECK-DEFAULT: str{{.*}},
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; CHECK-DEFAULT: ldr{{.*}}, #-4]
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; CHECK-DEFAULT: ldr{{.*}}, #-4]
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; CHECK-DEFAULT: sub{{.*}}, #8
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; CHECK-DEFAULT: str{{.*}}, #-4]
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; CHECK-DEFAULT: sub{{.*}}, #8
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; CHECK-COMPLEX: ldr{{.*}} lsl #2]
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; CHECK-COMPLEX: ldr{{.*}} lsl #2]
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; CHECK-COMPLEX: str{{.*}} lsl #2]
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; CHECK-COMPLEX: ldr{{.*}} lsl #2]
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; CHECK-COMPLEX: ldr{{.*}} lsl #2]
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; CHECK-COMPLEX: str{{.*}} lsl #2]
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; DISABLED-NOT: ldr{{.*}}]!
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; DISABLED-NOT: str{{.*}}]!
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define void @test_qadd_2_backwards(i32* %a.array, i32* %b.array, i32* %out.array, i32 %N) {
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entry:
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br label %loop
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loop:
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%i = phi i32 [ 0, %entry ], [ %i.next, %loop ]
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%idx.1 = phi i32 [ %N, %entry ], [ %idx.next, %loop ]
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%gep.a.1 = getelementptr inbounds i32, i32* %a.array, i32 %idx.1
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%a.1 = load i32, i32* %gep.a.1
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%gep.b.1 = getelementptr inbounds i32, i32* %b.array, i32 %idx.1
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%b.1 = load i32, i32* %gep.b.1
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%qadd.1 = call i32 @llvm.arm.qadd(i32 %a.1, i32 %b.1)
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%addr.1 = getelementptr inbounds i32, i32* %out.array, i32 %idx.1
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store i32 %qadd.1, i32* %addr.1
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%idx.2 = sub nsw nuw i32 %idx.1, 1
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%gep.a.2 = getelementptr inbounds i32, i32* %a.array, i32 %idx.2
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%a.2 = load i32, i32* %gep.a.2
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%gep.b.2 = getelementptr inbounds i32, i32* %b.array, i32 %idx.2
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%b.2 = load i32, i32* %gep.b.2
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%qadd.2 = call i32 @llvm.arm.qadd(i32 %a.2, i32 %b.2)
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%addr.2 = getelementptr inbounds i32, i32* %out.array, i32 %idx.2
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store i32 %qadd.2, i32* %addr.2
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%i.next = add nsw nuw i32 %i, -2
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%idx.next = sub nsw nuw i32 %idx.1, 2
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%cmp = icmp ult i32 %i.next, %N
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br i1 %cmp, label %loop, label %exit
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exit:
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ret void
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}
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; CHECK-LABEL: test_qadd_3
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; CHECK: @ %loop
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; CHECK-DEFAULT: ldr{{.*}}, #8]
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; CHECK-DEFAULT: ldr{{.*}}, #8]
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; CHECK-DEFAULT: str{{.*}}, #8]
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; CHECK-DEFAULT: ldr{{.*}}, #12]!
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; CHECK-DEFAULT: ldr{{.*}}, #12]!
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; CHECK-DEFAULT: str{{.*}}, #12]!
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; CHECK-COMPLEX: ldr{{.*}}, #12]!
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; CHECK-COMPLEX: ldr{{.*}}, #12]!
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; CHECK-COMPLEX: str{{.*}}, #12]!
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; CHECK-COMPLEX: ldr{{.*}}, #4]
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; CHECK-COMPLEX: ldr{{.*}}, #4]
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; CHECK-COMPLEX: str{{.*}}, #4]
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; CHECK-COMPLEX: ldr{{.*}}, #8]
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; CHECK-COMPLEX: ldr{{.*}}, #8]
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; CHECK-COMPLEX: str{{.*}}, #8]
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; DISABLED-NOT: ldr{{.*}}]!
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; DISABLED-NOT: str{{.*}}]!
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define void @test_qadd_3(i32* %a.array, i32* %b.array, i32* %out.array, i32 %N) {
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entry:
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br label %loop
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loop:
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%i = phi i32 [ 0, %entry ], [ %i.next, %loop ]
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%idx.1 = phi i32 [ 0, %entry ], [ %idx.next, %loop ]
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%gep.a.1 = getelementptr inbounds i32, i32* %a.array, i32 %idx.1
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%a.1 = load i32, i32* %gep.a.1
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%gep.b.1 = getelementptr inbounds i32, i32* %b.array, i32 %idx.1
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%b.1 = load i32, i32* %gep.b.1
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%qadd.1 = call i32 @llvm.arm.qadd(i32 %a.1, i32 %b.1)
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%addr.1 = getelementptr inbounds i32, i32* %out.array, i32 %idx.1
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store i32 %qadd.1, i32* %addr.1
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%idx.2 = add nuw nsw i32 %idx.1, 1
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%gep.a.2 = getelementptr inbounds i32, i32* %a.array, i32 %idx.2
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%a.2 = load i32, i32* %gep.a.2
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%gep.b.2 = getelementptr inbounds i32, i32* %b.array, i32 %idx.2
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%b.2 = load i32, i32* %gep.b.2
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%qadd.2 = call i32 @llvm.arm.qadd(i32 %a.2, i32 %b.2)
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%addr.2 = getelementptr inbounds i32, i32* %out.array, i32 %idx.2
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store i32 %qadd.2, i32* %addr.2
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%idx.3 = add nuw nsw i32 %idx.1, 2
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%gep.a.3 = getelementptr inbounds i32, i32* %a.array, i32 %idx.3
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%a.3 = load i32, i32* %gep.a.3
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%gep.b.3 = getelementptr inbounds i32, i32* %b.array, i32 %idx.3
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%b.3 = load i32, i32* %gep.b.3
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%qadd.3 = call i32 @llvm.arm.qadd(i32 %a.3, i32 %b.3)
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%addr.3 = getelementptr inbounds i32, i32* %out.array, i32 %idx.3
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store i32 %qadd.3, i32* %addr.3
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%i.next = add nsw nuw i32 %i, -3
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%idx.next = add nsw nuw i32 %idx.1, 3
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%cmp = icmp ult i32 %i.next, %N
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br i1 %cmp, label %loop, label %exit
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exit:
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ret void
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}
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; CHECK-LABEL: test_qadd_4
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; CHECK: @ %loop
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; TODO: pre-inc store
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; CHECK-DEFAULT: ldr{{.*}}, #4]
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; CHECK-DEFAULT: ldr{{.*}}, #4]
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; CHECK-DEFAULT: str{{.*}}, #4]
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; CHECK-DEFAULT: ldr{{.*}}, #8]
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; CHECK-DEFAULT: ldr{{.*}}, #8]
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; CHECK-DEFAULT: str{{.*}}, #8]
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; CHECK-DEFAULT: ldr{{.*}}, #12]
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; CHECK-DEFAULT: ldr{{.*}}, #12]
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; CHECK-DEFAULT: str{{.*}}, #12]
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; CHECK-COMPLEX: ldr{{.*}}, #16]!
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; CHECK-COMPLEX: ldr{{.*}}, #16]!
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; CHECK-COMPLEX: str{{.*}}, #16]!
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; CHECK-COMPLEX: ldr{{.*}}, #4]
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; CHECK-COMPLEX: ldr{{.*}}, #4]
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; CHECK-COMPLEX: str{{.*}}, #4]
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; CHECK-COMPLEX: ldr{{.*}}, #8]
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; CHECK-COMPLEX: ldr{{.*}}, #8]
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; CHECK-COMPLEX: str{{.*}}, #8]
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; CHECK-COMPLEX: ldr{{.*}}, #12]
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; CHECK-COMPLEX: ldr{{.*}}, #12]
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; CHECK-COMPLEX: str{{.*}}, #12]
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; DISABLED-NOT: ldr{{.*}}]!
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; DISABLED-NOT: str{{.*}}]!
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define void @test_qadd_4(i32* %a.array, i32* %b.array, i32* %out.array, i32 %N) {
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entry:
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br label %loop
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loop:
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%i = phi i32 [ 0, %entry ], [ %i.next, %loop ]
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%idx.1 = phi i32 [ 0, %entry ], [ %idx.next, %loop ]
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%gep.a.1 = getelementptr inbounds i32, i32* %a.array, i32 %idx.1
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%a.1 = load i32, i32* %gep.a.1
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%gep.b.1 = getelementptr inbounds i32, i32* %b.array, i32 %idx.1
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%b.1 = load i32, i32* %gep.b.1
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%qadd.1 = call i32 @llvm.arm.qadd(i32 %a.1, i32 %b.1)
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%addr.1 = getelementptr inbounds i32, i32* %out.array, i32 %idx.1
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store i32 %qadd.1, i32* %addr.1
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%idx.2 = or i32 %idx.1, 1
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%gep.a.2 = getelementptr inbounds i32, i32* %a.array, i32 %idx.2
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%a.2 = load i32, i32* %gep.a.2
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%gep.b.2 = getelementptr inbounds i32, i32* %b.array, i32 %idx.2
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%b.2 = load i32, i32* %gep.b.2
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%qadd.2 = call i32 @llvm.arm.qadd(i32 %a.2, i32 %b.2)
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%addr.2 = getelementptr inbounds i32, i32* %out.array, i32 %idx.2
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store i32 %qadd.2, i32* %addr.2
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%idx.3 = or i32 %idx.1, 2
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%gep.a.3 = getelementptr inbounds i32, i32* %a.array, i32 %idx.3
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%a.3 = load i32, i32* %gep.a.3
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%gep.b.3 = getelementptr inbounds i32, i32* %b.array, i32 %idx.3
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%b.3 = load i32, i32* %gep.b.3
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%qadd.3 = call i32 @llvm.arm.qadd(i32 %a.3, i32 %b.3)
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%addr.3 = getelementptr inbounds i32, i32* %out.array, i32 %idx.3
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store i32 %qadd.3, i32* %addr.3
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%idx.4 = or i32 %idx.1, 3
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%gep.a.4 = getelementptr inbounds i32, i32* %a.array, i32 %idx.4
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%a.4 = load i32, i32* %gep.a.4
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%gep.b.4 = getelementptr inbounds i32, i32* %b.array, i32 %idx.4
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%b.4 = load i32, i32* %gep.b.4
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%qadd.4 = call i32 @llvm.arm.qadd(i32 %a.4, i32 %b.4)
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%addr.4 = getelementptr inbounds i32, i32* %out.array, i32 %idx.4
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store i32 %qadd.4, i32* %addr.4
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%i.next = add nsw nuw i32 %i, -4
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%idx.next = add nsw nuw i32 %idx.1, 4
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%cmp = icmp ult i32 %i.next, %N
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br i1 %cmp, label %loop, label %exit
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exit:
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ret void
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}
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; CHECK-LABEL: test_qadd16_2
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; CHECK: @ %loop
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; TODO: pre-inc store.
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; CHECK-DEFAULT: ldr{{.*}}, #4]
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; CHECK-DEFAULT: ldr{{.*}}, #4]
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; CHECK-DEFAULT: str{{.*}}, #8]
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; CHECK-DEFAULT: ldr{{.*}}, #8]!
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; CHECK-DEFAULT: ldr{{.*}}, #8]!
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; CHECK-DEFAULT: str{{.*}}, #16]!
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; CHECK-COMPLEX: ldr{{.*}}, #8]!
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; CHECK-COMPLEX: ldr{{.*}}, #8]!
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; CHECK-COMPLEX: str{{.*}}, #16]!
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; CHECK-COMPLEX: ldr{{.*}}, #4]
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; CHECK-COMPLEX: ldr{{.*}}, #4]
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; CHECK-COMPLEX: str{{.*}}, #8]
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; DISABLED-NOT: ldr{{.*}}]!
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; DISABLED-NOT: str{{.*}}]!
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define void @test_qadd16_2(i16* %a.array, i16* %b.array, i32* %out.array, i32 %N) {
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entry:
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br label %loop
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loop:
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%i = phi i32 [ 0, %entry ], [ %i.next, %loop ]
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%idx.1 = phi i32 [ 0, %entry ], [ %idx.next, %loop ]
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%gep.a.1 = getelementptr inbounds i16, i16* %a.array, i32 %idx.1
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%cast.a.1 = bitcast i16* %gep.a.1 to i32*
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%a.1 = load i32, i32* %cast.a.1
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%gep.b.1 = getelementptr inbounds i16, i16* %b.array, i32 %idx.1
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%cast.b.1 = bitcast i16* %gep.b.1 to i32*
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%b.1 = load i32, i32* %cast.b.1
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%qadd.1 = call i32 @llvm.arm.qadd16(i32 %a.1, i32 %b.1)
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%addr.1 = getelementptr inbounds i32, i32* %out.array, i32 %idx.1
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store i32 %qadd.1, i32* %addr.1
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%idx.2 = add nsw nuw i32 %idx.1, 2
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%gep.a.2 = getelementptr inbounds i16, i16* %a.array, i32 %idx.2
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%cast.a.2 = bitcast i16* %gep.a.2 to i32*
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%a.2 = load i32, i32* %cast.a.2
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%gep.b.2 = getelementptr inbounds i16, i16* %b.array, i32 %idx.2
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%cast.b.2 = bitcast i16* %gep.b.2 to i32*
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%b.2 = load i32, i32* %cast.b.2
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%qadd.2 = call i32 @llvm.arm.qadd16(i32 %a.2, i32 %b.2)
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%addr.2 = getelementptr inbounds i32, i32* %out.array, i32 %idx.2
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store i32 %qadd.2, i32* %addr.2
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%i.next = add nsw nuw i32 %i, -2
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%idx.next = add nsw nuw i32 %idx.1, 4
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%cmp = icmp ult i32 %i.next, %N
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br i1 %cmp, label %loop, label %exit
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exit:
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ret void
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}
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declare i32 @llvm.arm.qadd(i32, i32)
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declare i32 @llvm.arm.qadd16(i32, i32)
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