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5a4b1ab0cd
Add an explicit construction of the ArrayRef, gcc 5 and earlier don't seem to select the ArrayRef constructor which takes a C array when the construction is implicit. Original commit message: - Avoid a crash when IPRA calls ARMFrameLowering::determineCalleeSaves with a null RegScavenger. Simply not updating the register scavenger is fine because IPRA only cares about the SavedRegs vector, the acutal code of the function has already been generated at this point. - Add a new hook to TargetRegisterInfo to get the set of registers which can be clobbered inside a call, even if the compiler can see both sides, by linker-generated code. Differential revision: https://reviews.llvm.org/D64908 llvm-svn: 367819
203 lines
5.5 KiB
LLVM
203 lines
5.5 KiB
LLVM
; RUN: llc -mtriple armv7a--none-eabi < %s | FileCheck %s --check-prefix=CHECK --check-prefix=DISABLED
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; RUN: llc -mtriple armv7a--none-eabi < %s -enable-ipra | FileCheck %s --check-prefix=CHECK --check-prefix=ENABLED
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define void @leaf() {
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entry:
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tail call void asm sideeffect "", ""()
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ret void
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}
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define void @leaf_r3() {
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entry:
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tail call void asm sideeffect "", "~{r3}"()
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ret void
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}
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define void @leaf_r4() {
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entry:
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tail call void asm sideeffect "", "~{r4}"()
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ret void
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}
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define void @leaf_s0() {
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entry:
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tail call void asm sideeffect "", "~{s0}"()
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ret void
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}
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define void @leaf_d0() {
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entry:
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tail call void asm sideeffect "", "~{d0}"()
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ret void
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}
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; r3 is normally caller-saved, but with IPRA we can see that it isn't used in
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; the callee, so can leave a live value in it.
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define void @test_r3_presrved() {
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; CHECK-LABEL: test_r3_presrved:
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entry:
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; CHECK: ASM1: r3
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; DISABLED: mov [[TEMP:r[0-9]+]], r3
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; ENABLED-NOT: r3
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; CHECK: bl leaf
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; DISABLED: mov r3, [[TEMP]]
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; ENABLED-NOT: r3
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; CHECK: ASM2: r3
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%a = tail call i32 asm sideeffect "// ASM1: $0", "={r3},0"(i32 undef)
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tail call void @leaf()
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%b = tail call i32 asm sideeffect "// ASM2: $0", "={r3},0"(i32 %a)
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ret void
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}
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; Same as above, but r3 is clobbered in the callee, so it is clobbered by the
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; call as normal.
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define void @test_r3_clobbered() {
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; CHECK-LABEL: test_r3_clobbered:
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entry:
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; CHECK: ASM1: r3
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; CHECK: mov [[TEMP:r[0-9]+]], r3
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; CHECK: bl leaf
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; CHECK: mov r3, [[TEMP]]
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; CHECK: ASM2: r3
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%a = tail call i32 asm sideeffect "// ASM1: $0", "={r3},0"(i32 undef)
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tail call void @leaf_r3()
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%b = tail call i32 asm sideeffect "// ASM2: $0", "={r3},0"(i32 %a)
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ret void
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}
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; r4 is a callee-saved register, so IPRA has no effect.
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define void @test_r4_preserved() {
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; CHECK-LABEL: test_r4_preserved:
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entry:
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; CHECK: ASM1: r4
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; CHECK-NOT: r4
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; CHECK: bl leaf
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; CHECK-NOT: r4
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; CHECK: ASM2: r4
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%a = tail call i32 asm sideeffect "// ASM1: $0", "={r4},0"(i32 undef)
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tail call void @leaf()
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%b = tail call i32 asm sideeffect "// ASM2: $0", "={r4},0"(i32 %a)
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ret void
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}
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define void @test_r4_clobbered() {
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; CHECK-LABEL: test_r4_clobbered:
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entry:
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; CHECK: ASM1: r4
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; CHECK-NOT: r4
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; CHECK: bl leaf_r4
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; CHECK-NOT: r4
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; CHECK: ASM2: r4
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%a = tail call i32 asm sideeffect "// ASM1: $0", "={r4},0"(i32 undef)
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tail call void @leaf_r4()
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%b = tail call i32 asm sideeffect "// ASM2: $0", "={r4},0"(i32 %a)
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ret void
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}
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; r12 is the intra-call scratch register, so we have to assume it is clobbered
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; even if we can see that the callee does not touch it.
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define void @test_r12() {
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; CHECK-LABEL: test_r12:
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entry:
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; CHECK: ASM1: r12
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; CHECK: mov [[TEMP:r[0-9]+]], r12
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; CHECK: bl leaf
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; CHECK: mov r12, [[TEMP]]
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; CHECK: ASM2: r12
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%a = tail call i32 asm sideeffect "// ASM1: $0", "={r12},0"(i32 undef)
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tail call void @leaf()
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%b = tail call i32 asm sideeffect "// ASM2: $0", "={r12},0"(i32 %a)
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ret void
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}
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; s0 and d0 are caller-saved, IPRA allows us to keep them live in the caller if
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; the callee doesn't modify them.
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define void @test_s0_preserved() {
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; CHECK-LABEL: test_s0_preserved:
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entry:
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; CHECK: ASM1: s0
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; DISABLED: vmov.f32 [[TEMP:s[0-9]+]], s0
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; ENABLED-NOT: s0
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; CHECK: bl leaf
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; DISABLED: vmov.f32 s0, [[TEMP]]
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; ENABLED-NOT: s0
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; CHECK: ASM2: s0
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%a = tail call float asm sideeffect "// ASM1: $0", "={s0},0"(float undef)
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tail call void @leaf()
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%b = tail call float asm sideeffect "// ASM2: $0", "={s0},0"(float %a)
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ret void
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}
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define void @test_s0_clobbered() {
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; CHECK-LABEL: test_s0_clobbered:
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entry:
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; CHECK: ASM1: s0
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; CHECK: vmov.f32 [[TEMP:s[0-9]+]], s0
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; CHECK: bl leaf_s0
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; CHECK: vmov.f32 s0, [[TEMP]]
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; CHECK: ASM2: s0
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%a = tail call float asm sideeffect "// ASM1: $0", "={s0},0"(float undef)
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tail call void @leaf_s0()
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%b = tail call float asm sideeffect "// ASM2: $0", "={s0},0"(float %a)
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ret void
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}
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define void @test_d0_preserved() {
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; CHECK-LABEL: test_d0_preserved:
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entry:
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; CHECK: ASM1: d0
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; DISABLED: vmov.f64 [[TEMP:d[0-9]+]], d0
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; ENABLED-NOT: d0
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; CHECK: bl leaf
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; DISABLED: vmov.f64 d0, [[TEMP]]
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; ENABLED-NOT: d0
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; CHECK: ASM2: d0
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%a = tail call double asm sideeffect "// ASM1: $0", "={d0},0"(double undef)
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tail call void @leaf()
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%b = tail call double asm sideeffect "// ASM2: $0", "={d0},0"(double %a)
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ret void
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}
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define void @test_d0_clobbered() {
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; CHECK-LABEL: test_d0_clobbered:
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entry:
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; CHECK: ASM1: d0
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; CHECK: vmov.f64 [[TEMP:d[0-9]+]], d0
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; CHECK: bl leaf_d0
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; CHECK: vmov.f64 d0, [[TEMP]]
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; CHECK: ASM2: d0
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%a = tail call double asm sideeffect "// ASM1: $0", "={d0},0"(double undef)
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tail call void @leaf_d0()
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%b = tail call double asm sideeffect "// ASM2: $0", "={d0},0"(double %a)
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ret void
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}
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; s0 and d0 overlap, so clobbering one in the callee prevents the other from
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; being kept live across the call.
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define void @test_s0_clobber_d0() {
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; CHECK-LABEL: test_s0_clobber_d0:
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entry:
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; CHECK: ASM1: s0
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; CHECK: vmov.f32 [[TEMP:s[0-9]+]], s0
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; CHECK: bl leaf_d0
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; CHECK: vmov.f32 s0, [[TEMP]]
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; CHECK: ASM2: s0
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%a = tail call float asm sideeffect "// ASM1: $0", "={s0},0"(float undef)
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tail call void @leaf_d0()
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%b = tail call float asm sideeffect "// ASM2: $0", "={s0},0"(float %a)
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ret void
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}
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define void @test_d0_clobber_s0() {
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; CHECK-LABEL: test_d0_clobber_s0:
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entry:
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; CHECK: ASM1: d0
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; CHECK: vmov.f64 [[TEMP:d[0-9]+]], d0
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; CHECK: bl leaf_s0
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; CHECK: vmov.f64 d0, [[TEMP]]
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; CHECK: ASM2: d0
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%a = tail call double asm sideeffect "// ASM1: $0", "={d0},0"(double undef)
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tail call void @leaf_s0()
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%b = tail call double asm sideeffect "// ASM2: $0", "={d0},0"(double %a)
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ret void
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}
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