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https://github.com/RPCS3/llvm-mirror.git
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9a76c13b82
This adds support for callee-pop conventions to the ARM backend so that it can ensure a call marked "tail" is actually a tail call.
243 lines
6.9 KiB
LLVM
243 lines
6.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc %s -o - -mtriple=thumbv8m.base | FileCheck %s
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declare i32 @g(...)
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declare i32 @h0(i32, i32, i32, i32)
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define hidden i32 @f0() {
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; CHECK-LABEL: f0:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: push {r7, lr}
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; CHECK-NEXT: bl g
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; CHECK-NEXT: movs r1, #1
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; CHECK-NEXT: movs r2, #2
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; CHECK-NEXT: movs r3, #3
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; CHECK-NEXT: ldr r7, [sp, #4]
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; CHECK-NEXT: mov lr, r7
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; CHECK-NEXT: pop {r7}
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; CHECK-NEXT: add sp, #4
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; CHECK-NEXT: b h0
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%1 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)()
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%2 = tail call i32 @h0(i32 %1, i32 1, i32 2, i32 3)
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ret i32 %2
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}
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declare i32 @h1(i32)
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define hidden i32 @f1() {
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; CHECK-LABEL: f1:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: push {r7, lr}
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; CHECK-NEXT: bl g
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; CHECK-NEXT: pop {r7}
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; CHECK-NEXT: pop {r1}
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; CHECK-NEXT: mov lr, r1
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; CHECK-NEXT: b h1
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%1 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)()
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%2 = tail call i32 @h1(i32 %1)
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ret i32 %2
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}
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declare i32 @h2(i32, i32, i32, i32, i32)
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define hidden i32 @f2(i32, i32, i32, i32, i32) {
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; CHECK-LABEL: f2:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: push {r4, r5, r6, r7, lr}
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; CHECK-NEXT: sub sp, #4
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; CHECK-NEXT: mov r4, r3
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; CHECK-NEXT: mov r5, r2
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; CHECK-NEXT: mov r6, r1
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; CHECK-NEXT: ldr r7, [sp, #24]
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; CHECK-NEXT: bl g
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; CHECK-NEXT: cbz r0, .LBB2_2
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; CHECK-NEXT: @ %bb.1:
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; CHECK-NEXT: str r7, [sp, #24]
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; CHECK-NEXT: mov r1, r6
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; CHECK-NEXT: mov r2, r5
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; CHECK-NEXT: mov r3, r4
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; CHECK-NEXT: add sp, #4
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; CHECK-NEXT: ldr r4, [sp, #16]
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; CHECK-NEXT: mov lr, r4
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; CHECK-NEXT: pop {r4, r5, r6, r7}
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; CHECK-NEXT: add sp, #4
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; CHECK-NEXT: b h2
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; CHECK-NEXT: .LBB2_2:
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; CHECK-NEXT: movs r0, #0
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; CHECK-NEXT: mvns r0, r0
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; CHECK-NEXT: add sp, #4
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; CHECK-NEXT: pop {r4, r5, r6, r7, pc}
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%6 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)()
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%7 = icmp eq i32 %6, 0
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br i1 %7, label %10, label %8
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%9 = tail call i32 @h2(i32 %6, i32 %1, i32 %2, i32 %3, i32 %4)
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br label %10
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%11 = phi i32 [ %9, %8 ], [ -1, %5 ]
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ret i32 %11
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}
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; Make sure that tail calls to function pointers that require r0-r3 for argument
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; passing do not break the compiler.
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@fnptr = global i32 (i32, i32, i32, i32)* null
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define i32 @test3() {
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; CHECK-LABEL: test3:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: push {r4, lr}
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; CHECK-NEXT: movw r0, :lower16:fnptr
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; CHECK-NEXT: movt r0, :upper16:fnptr
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; CHECK-NEXT: ldr r4, [r0]
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; CHECK-NEXT: movs r0, #1
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; CHECK-NEXT: movs r1, #2
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; CHECK-NEXT: movs r2, #3
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; CHECK-NEXT: movs r3, #4
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; CHECK-NEXT: blx r4
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; CHECK-NEXT: pop {r4, pc}
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%1 = load i32 (i32, i32, i32, i32)*, i32 (i32, i32, i32, i32)** @fnptr
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%2 = tail call i32 %1(i32 1, i32 2, i32 3, i32 4)
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ret i32 %2
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}
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@fnptr2 = global i32 (i32, i32, i64)* null
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define i32 @test4() {
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; CHECK-LABEL: test4:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: push {r4, lr}
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; CHECK-NEXT: movw r0, :lower16:fnptr2
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; CHECK-NEXT: movt r0, :upper16:fnptr2
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; CHECK-NEXT: ldr r4, [r0]
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; CHECK-NEXT: movs r0, #1
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; CHECK-NEXT: movs r1, #2
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; CHECK-NEXT: movs r2, #3
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; CHECK-NEXT: movs r3, #0
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; CHECK-NEXT: blx r4
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; CHECK-NEXT: pop {r4, pc}
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%1 = load i32 (i32, i32, i64)*, i32 (i32, i32, i64)** @fnptr2
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%2 = tail call i32 %1(i32 1, i32 2, i64 3)
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ret i32 %2
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}
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; Check that tail calls to function pointers where not all of r0-r3 are used for
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; parameter passing are tail-call optimized.
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; test5: params in r0, r1. r2 & r3 are free.
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@fnptr3 = global i32 (i32, i32)* null
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define i32 @test5() {
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; CHECK-LABEL: test5:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: movw r0, :lower16:fnptr3
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; CHECK-NEXT: movt r0, :upper16:fnptr3
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; CHECK-NEXT: ldr r2, [r0]
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; CHECK-NEXT: movs r0, #1
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; CHECK-NEXT: movs r1, #2
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; CHECK-NEXT: bx r2
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%1 = load i32 (i32, i32)*, i32 (i32, i32)** @fnptr3
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%2 = tail call i32 %1(i32 1, i32 2)
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ret i32 %2
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}
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; test6: params in r0 and r2-r3. r1 is free.
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@fnptr4 = global i32 (i32, i64)* null
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define i32 @test6() {
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; CHECK-LABEL: test6:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: movw r0, :lower16:fnptr4
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; CHECK-NEXT: movt r0, :upper16:fnptr4
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; CHECK-NEXT: ldr r1, [r0]
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; CHECK-NEXT: movs r0, #1
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; CHECK-NEXT: movs r2, #2
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; CHECK-NEXT: movs r3, #0
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; CHECK-NEXT: bx r1
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%1 = load i32 (i32, i64)*, i32 (i32, i64)** @fnptr4
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%2 = tail call i32 %1(i32 1, i64 2)
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ret i32 %2
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}
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; Check that tail calls to functions other than function pointers are
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; tail-call optimized.
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define i32 @test7() {
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; CHECK-LABEL: test7:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: movs r0, #1
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; CHECK-NEXT: movs r1, #2
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; CHECK-NEXT: movs r2, #3
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; CHECK-NEXT: movs r3, #4
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; CHECK-NEXT: b bar
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%tail = tail call i32 @bar(i32 1, i32 2, i32 3, i32 4)
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ret i32 %tail
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}
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declare i32 @bar(i32, i32, i32, i32)
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; Regression test for failure to load indirect branch target (class tcGPR) from
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; a stack slot.
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%struct.S = type { i32 }
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define void @test8(i32 (i32, i32, i32)* nocapture %fn, i32 %x) local_unnamed_addr {
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; CHECK-LABEL: test8:
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; CHECK: @ %bb.0: @ %entry
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; CHECK-NEXT: push {r4, r5, r6, r7, lr}
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; CHECK-NEXT: sub sp, #4
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; CHECK-NEXT: mov r4, r1
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; CHECK-NEXT: str r0, [sp] @ 4-byte Spill
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; CHECK-NEXT: bl test8_u
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; CHECK-NEXT: mov r5, r0
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; CHECK-NEXT: ldr r6, [r0]
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; CHECK-NEXT: movs r7, #0
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; CHECK-NEXT: mov r0, r7
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; CHECK-NEXT: bl test8_h
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; CHECK-NEXT: mov r1, r0
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; CHECK-NEXT: mov r0, r6
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; CHECK-NEXT: mov r2, r7
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; CHECK-NEXT: bl test8_g
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; CHECK-NEXT: str r4, [r5]
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; CHECK-NEXT: movs r0, #1
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; CHECK-NEXT: movs r1, #2
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; CHECK-NEXT: movs r2, #3
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; CHECK-NEXT: ldr r3, [sp] @ 4-byte Reload
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; CHECK-NEXT: add sp, #4
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; CHECK-NEXT: ldr r4, [sp, #16]
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; CHECK-NEXT: mov lr, r4
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; CHECK-NEXT: pop {r4, r5, r6, r7}
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; CHECK-NEXT: add sp, #4
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; CHECK-NEXT: bx r3
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entry:
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%call = tail call %struct.S* bitcast (%struct.S* (...)* @test8_u to %struct.S* ()*)()
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%a = getelementptr inbounds %struct.S, %struct.S* %call, i32 0, i32 0
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%0 = load i32, i32* %a, align 4
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%call1 = tail call i32 @test8_h(i32 0)
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%call2 = tail call i32 @test8_g(i32 %0, i32 %call1, i32 0)
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store i32 %x, i32* %a, align 4
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%call4 = tail call i32 %fn(i32 1, i32 2, i32 3)
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ret void
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}
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declare %struct.S* @test8_u(...)
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declare i32 @test8_g(i32, i32, i32)
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declare i32 @test8_h(i32)
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; Check that we don't introduce an unnecessary spill of lr.
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declare i32 @h9(i32, i32, i32, i32)
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define i32 @test9(i32* %x, i32* %y, i32* %z, i32* %a) {
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; CHECK-LABEL: test9:
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; CHECK: @ %bb.0:
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; CHECK-NEXT: push {r4, r7}
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; CHECK-NEXT: ldr r4, [r3]
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; CHECK-NEXT: ldr r3, [r3, #4]
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; CHECK-NEXT: adds r3, r4, r3
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; CHECK-NEXT: ldr r1, [r1]
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; CHECK-NEXT: ldr r0, [r0]
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; CHECK-NEXT: ldr r2, [r2]
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; CHECK-NEXT: pop {r4, r7}
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; CHECK-NEXT: b h9
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%zz = load i32, i32* %z
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%xx = load i32, i32* %x
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%yy = load i32, i32* %y
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%aa1 = load i32, i32* %a
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%a2 = getelementptr i32, i32* %a, i32 1
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%aa2 = load i32, i32* %a2
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%aa = add i32 %aa1, %aa2
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%r = tail call i32 @h9(i32 %xx, i32 %yy, i32 %zz, i32 %aa)
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ret i32 %r
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}
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