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https://github.com/RPCS3/llvm-mirror.git
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7b7d569297
Summary: A lot of the pseudo instructions are required because LLVM assumes that all integers of the same size as the pointer size are legal. This means that it will not currently expand 16-bit instructions to their 8-bit variants because it thinks 16-bit types are legal for the operations. This also adds all of the CodeGen tests that required the pass to run. Reviewers: arsenm, kparzysz Subscribers: wdng, mgorny, modocache, llvm-commits Differential Revision: https://reviews.llvm.org/D26577 llvm-svn: 287162
93 lines
1.9 KiB
LLVM
93 lines
1.9 KiB
LLVM
; RUN: llc < %s -march=avr | FileCheck %s
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define i8 @sub8_reg_reg(i8 %a, i8 %b) {
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; CHECK-LABEL: sub8_reg_reg:
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; CHECK: sub r24, r22
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%result = sub i8 %a, %b
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ret i8 %result
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}
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define i8 @sub8_reg_imm(i8 %a) {
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; CHECK-LABEL: sub8_reg_imm:
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; CHECK: subi r24, 5
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%result = sub i8 %a, 5
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ret i8 %result
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}
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define i8 @sub8_reg_decrement(i8 %a) {
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; CHECK-LABEL: sub8_reg_decrement:
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; CHECK: dec r24
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%result = sub i8 %a, 1
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ret i8 %result
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}
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define i16 @sub16_reg_reg(i16 %a, i16 %b) {
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; CHECK-LABEL: sub16_reg_reg:
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; CHECK: sub r24, r22
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; CHECK: sbc r25, r23
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%result = sub i16 %a, %b
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ret i16 %result
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}
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define i16 @sub16_reg_imm(i16 %a) {
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; CHECK-LABEL: sub16_reg_imm:
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; CHECK: sbiw r24, 63
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%result = sub i16 %a, 63
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ret i16 %result
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}
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define i16 @sub16_reg_imm_subi(i16 %a) {
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; CHECK-LABEL: sub16_reg_imm_subi:
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; CHECK: subi r24, 210
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; CHECK: sbci r25, 4
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%result = sub i16 %a, 1234
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ret i16 %result
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}
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define i32 @sub32_reg_reg(i32 %a, i32 %b) {
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; CHECK-LABEL: sub32_reg_reg:
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; CHECK: sub r22, r18
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; CHECK: sbc r23, r19
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; CHECK: sbc r24, r20
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; CHECK: sbc r25, r21
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%result = sub i32 %a, %b
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ret i32 %result
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}
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define i32 @sub32_reg_imm(i32 %a) {
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; CHECK-LABEL: sub32_reg_imm:
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; CHECK: subi r22, 21
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; CHECK: sbci r23, 205
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; CHECK: sbci r24, 91
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; CHECK: sbci r25, 7
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%result = sub i32 %a, 123456789
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ret i32 %result
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}
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define i64 @sub64_reg_reg(i64 %a, i64 %b) {
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; CHECK-LABEL: sub64_reg_reg:
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; CHECK: sub r18, r10
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; CHECK: sbc r20, r12
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; CHECK: sbc r21, r13
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; CHECK: sbc r22, r14
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; CHECK: sbc r23, r15
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; CHECK: sbc r24, r16
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; CHECK: sbc r25, r17
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%result = sub i64 %a, %b
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ret i64 %result
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}
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define i64 @sub64_reg_imm(i64 %a) {
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; CHECK-LABEL: sub64_reg_imm:
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; CHECK: subi r18, 204
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; CHECK: sbci r19, 204
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; CHECK: sbci r20, 104
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; CHECK: sbci r21, 37
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; CHECK: sbci r22, 25
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; CHECK: sbci r23, 22
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; CHECK: sbci r24, 236
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; CHECK: sbci r25, 190
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%result = sub i64 %a, 13757395258967641292
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ret i64 %result
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}
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