mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-22 18:54:02 +01:00
262321d1ff
This patch lets the llvm tools handle the new HVX target features that
are added by frontend (clang). The target-features are of the form
"hvx-length64b" for 64 Byte HVX mode, "hvx-length128b" for 128 Byte mode HVX.
"hvx-double" is an alias to "hvx-length128b" and is soon will be deprecated.
The hvx version target feature is upgated form "+hvx" to "+hvxv{version_number}.
Eg: "+hvxv62"
For the correct HVX code generation, the user must use the following
target features.
For 64B mode: "+hvxv62" "+hvx-length64b"
For 128B mode: "+hvxv62" "+hvx-length128b"
Clang picks a default length if none is specified. If for some reason,
no hvx-length is specified to llvm, the compilation will bail out.
There is a corresponding clang patch.
Differential Revision: https://reviews.llvm.org/D38851
llvm-svn: 316101
18 lines
514 B
LLVM
18 lines
514 B
LLVM
; RUN: llc -march=hexagon < %s | FileCheck %s
|
|
; CHECK: bitsplit(r{{[0-9]+}},#5)
|
|
|
|
target triple = "hexagon"
|
|
|
|
define i32 @fred(i32 %a, i32* nocapture readonly %b) local_unnamed_addr #0 {
|
|
entry:
|
|
%and = and i32 %a, 31
|
|
%shr = lshr i32 %a, 5
|
|
%arrayidx = getelementptr inbounds i32, i32* %b, i32 %shr
|
|
%0 = load i32, i32* %arrayidx, align 4
|
|
%shr1 = lshr i32 %0, %and
|
|
%and2 = and i32 %shr1, 1
|
|
ret i32 %and2
|
|
}
|
|
|
|
attributes #0 = { norecurse nounwind readonly "target-cpu"="hexagonv60" "target-features"="-hvx" }
|