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llvm-mirror/test/CodeGen/Hexagon/vect/vect-extract-i1-debug.ll
2017-12-20 14:44:05 +00:00

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414 B
LLVM

; RUN: llc -march=hexagon -debug-only=isel < %s 2>/dev/null
; REQUIRES: asserts
; Make sure that this doesn't crash. Debug option enabled a failing assertion
; about type mismatch in formal arguments.
; CHECK: vaddub
define i1 @t_i4x8(<4 x i8> %a, <4 x i8> %b) nounwind {
entry:
%0 = add <4 x i8> %a, %b
%1 = bitcast <4 x i8> %0 to <32 x i1>
%2 = extractelement <32 x i1> %1, i32 0
ret i1 %2
}