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90e010bd3c
This patch combines some cases of ARMISD::CMOV for integers that arise in comparisons of the form a != b ? x : 0 a == b ? 0 : x and that currently (e.g. in Thumb1) are emitted as branches. Differential Revision: https://reviews.llvm.org/D34515 llvm-svn: 325323
111 lines
2.5 KiB
LLVM
111 lines
2.5 KiB
LLVM
; RUN: llc -mtriple=thumb-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - | FileCheck %s
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; These tests would be improved by 'movs r0, #0' being rematerialized below the
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; tst as 'mov.w r0, #0'.
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; 0x000000bb = 187
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define i32 @f2(i32 %a) {
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%tmp = and i32 %a, 187
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%tmp1 = icmp eq i32 0, %tmp
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%ret = select i1 %tmp1, i32 42, i32 24
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ret i32 %ret
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}
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; CHECK-LABEL: f2:
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; CHECK: tst.w {{.*}}, #187
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; 0x00aa00aa = 11141290
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define i32 @f3(i32 %a) {
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%tmp = and i32 %a, 11141290
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%tmp1 = icmp eq i32 %tmp, 0
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%ret = select i1 %tmp1, i32 42, i32 24
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ret i32 %ret
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}
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; CHECK-LABEL: f3:
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; CHECK: tst.w {{.*}}, #11141290
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; 0xcc00cc00 = 3422604288
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define i32 @f6(i32 %a) {
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%tmp = and i32 %a, 3422604288
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%tmp1 = icmp eq i32 0, %tmp
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%ret = select i1 %tmp1, i32 42, i32 24
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ret i32 %ret
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}
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; CHECK-LABEL: f6:
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; CHECK: tst.w {{.*}}, #-872363008
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; 0xdddddddd = 3722304989
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define i32 @f7(i32 %a) {
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%tmp = and i32 %a, 3722304989
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%tmp1 = icmp eq i32 %tmp, 0
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%ret = select i1 %tmp1, i32 42, i32 24
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ret i32 %ret
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}
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; CHECK-LABEL: f7:
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; CHECK: tst.w {{.*}}, #-572662307
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; 0x00110000 = 1114112
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define i32 @f10(i32 %a) {
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%tmp = and i32 %a, 1114112
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%tmp1 = icmp eq i32 0, %tmp
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%ret = select i1 %tmp1, i32 42, i32 24
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ret i32 %ret
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}
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; CHECK-LABEL: f10:
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; CHECK: tst.w {{.*}}, #1114112
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; 0x000000bb = 187
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define i1 @f12(i32 %a) {
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%tmp = and i32 %a, 187
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%tmp1 = icmp eq i32 0, %tmp
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ret i1 %tmp1
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}
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; CHECK-LABEL: f12:
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; CHECK: and r0, r0, #187
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; CHECK-NEXT: clz r0, r0
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; CHECK-NEXT: lsrs r0, r0, #5
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; 0x00aa00aa = 11141290
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define i1 @f13(i32 %a) {
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%tmp = and i32 %a, 11141290
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%tmp1 = icmp eq i32 %tmp, 0
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ret i1 %tmp1
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}
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; CHECK-LABEL: f13:
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; CHECK: and r0, r0, #11141290
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; CHECK-NEXT: clz r0, r0
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; CHECK-NEXT: lsrs r0, r0, #5
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; 0xcc00cc00 = 3422604288
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define i1 @f16(i32 %a) {
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%tmp = and i32 %a, 3422604288
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%tmp1 = icmp eq i32 0, %tmp
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ret i1 %tmp1
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}
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; CHECK-LABEL: f16:
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; CHECK: and r0, r0, #-872363008
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; CHECK-NEXT: clz r0, r0
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; CHECK-NEXT: lsrs r0, r0, #5
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; 0xdddddddd = 3722304989
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define i1 @f17(i32 %a) {
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%tmp = and i32 %a, 3722304989
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%tmp1 = icmp eq i32 %tmp, 0
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ret i1 %tmp1
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}
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; CHECK-LABEL: f17:
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; CHECK: bic r0, r0, #572662306
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; CHECK-NEXT: clz r0, r0
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; CHECK-NEXT: lsrs r0, r0, #5
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; 0x00110000 = 1114112
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define i1 @f18(i32 %a) {
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%tmp = and i32 %a, 1114112
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%tmp1 = icmp eq i32 0, %tmp
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ret i1 %tmp1
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}
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; CHECK-LABEL: f18:
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; CHECK: and r0, r0, #1114112
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; CHECK-NEXT: clz r0, r0
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; CHECK-NEXT: lsrs r0, r0, #5
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