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llvm-mirror/include/llvm/Target
Oliver Stannard 20a7d7760f [AsmParser] Add DiagnosticString to register classes in tablegen
This allows a DiagnosticType and/or DiagnosticString to be associated
with a RegisterClass in tablegen, so that we can emit diagnostics in the
assembler when a register operand is incorrect.

DiagnosticType creates a predictable enum value, which gets returned as
the error code when an operand does not match, and can be used by the
assembly parser to map to a user-facing diagnostic. DiagnosticString
creates an anonymous enum value (currently based on the tablegen class
name), and a function to map from enum values to strings will be
generated. Both of these work the same was as they do for AsmOperand.

This isn't used by any targets yet, but has one (positive) side-effect.
It improves the diagnostic codes returned by validateOperandClass - we
always want to emit the diagnostic that relates to the expected operand
class, but this wasn't always being done when the expected and actual
classes were completely different (token/register/custom). This causes a
few AArch64 diagnostics to be improved, as Match_InvalidOperand was
being returned instead of a specific diagnostic type.

Differential revision: https://reviews.llvm.org/D36691

llvm-svn: 315295
2017-10-10 11:00:40 +00:00
..
GlobalISel [globalisel] Add a G_BSWAP instruction and support bswap using it. 2017-09-19 14:25:15 +00:00
CostTable.h
GenericOpcodes.td [GlobalISel] Update the documentation and comment for G_[UN]MERGE_VALUES 2017-09-25 22:03:06 +00:00
Target.td [AsmParser] Add DiagnosticString to register classes in tablegen 2017-10-10 11:00:40 +00:00
TargetCallingConv.h
TargetCallingConv.td
TargetFrameLowering.h Add "Restored" flag to CalleeSavedInfo 2017-08-10 16:17:32 +00:00
TargetInstrInfo.h [MachineOutliner] Disable outlining from LinkOnceODRs by default 2017-10-07 00:16:34 +00:00
TargetIntrinsicInfo.h
TargetItinerary.td
TargetLowering.h [DAG, x86] allow store merging before and after legalization (PR34217) 2017-09-18 20:54:26 +00:00
TargetLoweringObjectFile.h [WebAssembly] Remove flags from MCSectionWasm 2017-09-12 18:31:24 +00:00
TargetMachine.h IPRA: Allow target to enable IPRA by default 2017-08-14 19:54:47 +00:00
TargetOpcodes.def [globalisel] Add a G_BSWAP instruction and support bswap using it. 2017-09-19 14:25:15 +00:00
TargetOpcodes.h
TargetOptions.h
TargetRegisterInfo.h [SystemZ] implement shouldCoalesce() 2017-09-29 14:31:39 +00:00
TargetSchedule.td
TargetSelectionDAG.td [AArch64] LSE Atomics reorg - part 1 2017-08-05 04:30:55 +00:00
TargetSubtargetInfo.h Subtarget support for parameterized register class information 2017-09-14 20:44:20 +00:00