Simon Pilgrim 0800d72a1a [X86][SSE] Add zero element and general 64-bit VZEXT_LOAD support to EltsFromConsecutiveLoads ... This patch adds support for trailing zero elements to VZEXT_LOAD loads (and checks that no zero elts occur within the consecutive load). It also generalizes the 64-bit VZEXT_LOAD load matching to work for loads other than 2x32-bit loads. After this patch it will also be easier to add support for other basic load patterns like 32-bit VZEXT_LOAD loads, PMOVZX and subvector load insertion. Differential Revision: http://reviews.llvm.org/D16217 llvm-svn: 258798		2016-01-26 09:30:08 +00:00
..
AArch64	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00
AMDGPU	AMDGPU: Make v32i8/v64i8 illegal types	2016-01-26 04:43:48 +00:00
ARM	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00
BPF
CPP
Generic	Unxfail passing testcase on Hexagon	2016-01-14 15:24:15 +00:00
Hexagon	[Hexagon] Use general purpose registers to spill pred/mod registers into	2016-01-22 19:15:58 +00:00
Inputs
Mips	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00
MIR	Reapply r257105 "[Verifier] Check that debug values have proper size"	2016-01-15 00:46:17 +00:00
MSP430
NVPTX	[CUDA] Die gracefully when trying to output an LLVM alias.	2016-01-23 21:12:20 +00:00
PowerPC	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00
SPARC
SystemZ
Thumb	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00
Thumb2	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00
WebAssembly	[WebAssembly] Optimize memcpy/memmove/memcpy calls.	2016-01-26 04:01:11 +00:00
WinEH	[WinEH] Don't miscompile cleanups which conditionally unwind to caller	2016-01-23 23:54:33 +00:00
X86	[X86][SSE] Add zero element and general 64-bit VZEXT_LOAD support to EltsFromConsecutiveLoads	2016-01-26 09:30:08 +00:00
XCore	[MC] Use .p2align instead of .align	2016-01-26 00:03:25 +00:00