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llvm-mirror/test/CodeGen/ARM/fdivs.ll
Jakob Stoklund Olesen b38d4fe021 Remove some register allocation order dependencies.
llvm-svn: 172874
2013-01-19 00:03:32 +00:00

24 lines
693 B
LLVM

; RUN: llc < %s -march=arm -mattr=+vfp2 | FileCheck %s -check-prefix=VFP2
; RUN: llc < %s -march=arm -mattr=+neon | FileCheck %s -check-prefix=NFP0
; RUN: llc < %s -march=arm -mcpu=cortex-a8 | FileCheck %s -check-prefix=CORTEXA8
; RUN: llc < %s -march=arm -mcpu=cortex-a9 | FileCheck %s -check-prefix=CORTEXA9
define float @test(float %a, float %b) {
entry:
%0 = fdiv float %a, %b
ret float %0
}
; VFP2: test:
; VFP2: vdiv.f32 s{{.}}, s{{.}}, s{{.}}
; NFP1: test:
; NFP1: vdiv.f32 s{{.}}, s{{.}}, s{{.}}
; NFP0: test:
; NFP0: vdiv.f32 s{{.}}, s{{.}}, s{{.}}
; CORTEXA8: test:
; CORTEXA8: vdiv.f32 s{{.}}, s{{.}}, s{{.}}
; CORTEXA9: test:
; CORTEXA9: vdiv.f32 s{{.}}, s{{.}}, s{{.}}