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6fcee67989
and into the ScheduleDAGInstrs class, so that they don't get destructed and re-constructed for each block. This fixes a compile-time hot spot in the post-pass scheduler. To help facilitate this, tidy and do some minor reorganization in the scheduler constructor functions. llvm-svn: 62275
61 lines
1.6 KiB
C++
61 lines
1.6 KiB
C++
//===-- PIC16ISelDAGToDAG.cpp - A dag to dag inst selector for PIC16 ------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines an instruction selector for the PIC16 target.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "pic16-isel"
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#include "PIC16.h"
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#include "PIC16ISelLowering.h"
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#include "PIC16RegisterInfo.h"
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#include "PIC16TargetMachine.h"
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#include "llvm/CodeGen/SelectionDAGISel.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Intrinsics.h"
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using namespace llvm;
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namespace {
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class VISIBILITY_HIDDEN PIC16DAGToDAGISel : public SelectionDAGISel {
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/// TM - Keep a reference to PIC16TargetMachine.
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PIC16TargetMachine &TM;
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/// PIC16Lowering - This object fully describes how to lower LLVM code to an
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/// PIC16-specific SelectionDAG.
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PIC16TargetLowering PIC16Lowering;
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public:
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explicit PIC16DAGToDAGISel(PIC16TargetMachine &tm) :
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SelectionDAGISel(tm),
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TM(tm), PIC16Lowering(*TM.getTargetLowering()) {}
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// Pass Name
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virtual const char *getPassName() const {
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return "PIC16 DAG->DAG Pattern Instruction Selection";
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}
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virtual void InstructionSelect();
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private:
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// Include the pieces autogenerated from the target description.
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#include "PIC16GenDAGISel.inc"
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SDNode *Select(SDValue N);
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// Match direct address complex pattern.
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bool SelectDirectAddr(SDValue Op, SDValue N, SDValue &Address);
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};
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}
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