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llvm-mirror/lib/CodeGen/GlobalISel
Diana Picus 070c98b2bf [ARM] GlobalISel: Lower double precision FP args
For the hard float calling convention, we just use the D registers.

For the soft-fp calling convention, we use the R registers and move values
to/from the D registers by means of G_SEQUENCE/G_EXTRACT. While doing so, we
make sure to honor the endianness of the target, since the CCAssignFn doesn't do
that for us.

For pure soft float targets, we still bail out because we don't support the
libcalls yet.

llvm-svn: 295295
2017-02-16 07:53:07 +00:00
..
CallLowering.cpp [ARM] GlobalISel: Lower double precision FP args 2017-02-16 07:53:07 +00:00
CMakeLists.txt Try to prevent build breakage by touching a CMakeLists.txt. 2017-01-25 02:55:24 +00:00
GlobalISel.cpp
InstructionSelect.cpp GlobalISel: tidy up def/use test. NFC. 2017-01-30 20:52:37 +00:00
InstructionSelector.cpp [GlobalISel] Refactor the logic to constraint registers. 2016-12-22 21:56:19 +00:00
IRTranslator.cpp GlobalISel: support translating va_arg 2017-02-15 23:22:33 +00:00
Legalizer.cpp
LegalizerHelper.cpp GlobalISel: legalize va_arg on AArch64. 2017-02-15 23:22:50 +00:00
LegalizerInfo.cpp GlobalISel: legalize va_arg on AArch64. 2017-02-15 23:22:50 +00:00
LLVMBuild.txt
MachineIRBuilder.cpp GlobalISel: introduce G_PTR_MASK to simplify alloca handling. 2017-02-14 20:56:18 +00:00
RegBankSelect.cpp Cleanup dump() functions. 2017-01-28 02:02:38 +00:00
RegisterBank.cpp Cleanup dump() functions. 2017-01-28 02:02:38 +00:00
RegisterBankInfo.cpp unique_ptrify some containers in GlobalISel::RegisterBankInfo 2017-01-30 17:13:56 +00:00
Utils.cpp [GlobalISel] Refactor the logic to constraint registers. 2016-12-22 21:56:19 +00:00