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llvm-mirror/test/CodeGen/AArch64/wineh-save-lrpair1.mir
Martin Storsjö fda1e859d8 [AArch64] Allow pairing lr with other GPRs for WinCFI
This saves one instruction per prologue/epilogue for any function with
an odd number of callee-saved GPRs, but more importantly, allows such
functions to match the packed unwind format.

Differential Revision: https://reviews.llvm.org/D88699
2020-10-03 21:37:22 +03:00

75 lines
2.0 KiB
YAML

# RUN: llc -o - %s -mtriple=aarch64-windows -start-before=prologepilog \
# RUN: -stop-after=prologepilog | FileCheck %s
# RUN: llc -o - %s -mtriple=aarch64-windows -start-before=prologepilog \
# RUN: | FileCheck --check-prefix=ASM %s
# Check that an odd callee-saved GPR is paired with lr
# CHECK: early-clobber $sp = frame-setup STPXpre killed $x19, killed $x20, $sp, -4
# CHECK-NEXT: frame-setup SEH_SaveRegP_X 19, 20, -32
# CHECK-NEXT: frame-setup STPXi killed $x21, killed $lr, $sp, 2
# CHECK-NEXT: frame-setup SEH_SaveRegP 21, 30, 16
# CHECK-NEXT: frame-setup SEH_PrologEnd
# ASM: stp x19, x20, [sp, #-32]!
# ASM-NEXT: .seh_save_regp_x x19, 32
# ASM-NEXT: stp x21, x30, [sp, #16]
# ASM-NEXT: .seh_save_lrpair x21, 16
# ASM-NEXT: .seh_endprologue
--- |
define dso_local i32 @func(i32 %a) { ret i32 %a }
declare dso_local i32 @other()
...
---
name: func
alignment: 4
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
hasWinCFI: false
registers: []
liveins: []
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 4
adjustsStack: false
hasCalls: false
stackProtector: ''
maxCallFrameSize: 0
cvBytesOfCalleeSavedRegisters: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
localFrameSize: 4
savePoint: ''
restorePoint: ''
fixedStack: []
stack: []
callSites: []
constants: []
machineFunctionInfo: {}
body: |
bb.0:
liveins: $x0, $x21, $x19, $x20
BL @other, csr_aarch64_aapcs, implicit-def dead $lr, implicit $sp, implicit $w0, implicit-def $sp, implicit-def $w0
$x19 = ADDXrr $x0, $x0
$x20 = ADDXrr $x19, $x0
$x21 = ADDXrr $x20, killed $x19
$x0 = ADDXrr $x0, killed $x21
RET_ReallyLR
...