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llvm-mirror/lib/Target/AArch64
James Molloy bdab73bad5 Revert "[AArch64]Merge halfword loads into a 32-bit load"
This reverts commit r250719. This introduced a codegen fault in SPEC2000.gcc, when compiled for Cortex-A53.

llvm-svn: 251108
2015-10-23 10:41:38 +00:00
..
AsmParser Make a bunch of static arrays const. 2015-10-18 05:15:34 +00:00
Disassembler [MC layer][AArch64] llvm-mc accepts 4-bit immediate values for 2015-10-05 13:42:31 +00:00
InstPrinter Make a bunch of static arrays const. 2015-10-18 05:15:34 +00:00
MCTargetDesc Fix pr24486. 2015-10-05 12:07:05 +00:00
TargetInfo
Utils
AArch64.h
AArch64.td [AArch64] Lower READCYCLECOUNTER using MRS PMCCTNR_EL0. 2015-09-01 16:23:45 +00:00
AArch64A53Fix835769.cpp AArch64: Remove implicit ilist iterator conversions, NFC 2015-10-13 20:02:15 +00:00
AArch64A57FPLoadBalancing.cpp
AArch64AddressTypePromotion.cpp
AArch64AdvSIMDScalarPass.cpp AArch64: Remove implicit ilist iterator conversions, NFC 2015-10-13 20:02:15 +00:00
AArch64AsmPrinter.cpp
AArch64BranchRelaxation.cpp AArch64: Remove implicit ilist iterator conversions, NFC 2015-10-13 20:02:15 +00:00
AArch64CallingConvention.h
AArch64CallingConvention.td
AArch64CleanupLocalDynamicTLSPass.cpp AArch64: Make getNextNode() cleanup in r249764 more clear 2015-10-09 16:54:54 +00:00
AArch64CollectLOH.cpp [AArch64][CollectLOH] Remove an invalid assertion and add a test case exposing it. 2015-08-31 19:02:00 +00:00
AArch64ConditionalCompares.cpp
AArch64ConditionOptimizer.cpp
AArch64DeadRegisterDefinitionsPass.cpp
AArch64ExpandPseudoInsts.cpp
AArch64FastISel.cpp AArch64: Remove implicit ilist iterator conversions, NFC 2015-10-13 20:02:15 +00:00
AArch64FrameLowering.cpp Remove redundant TargetFrameLowering::getFrameIndexOffset virtual 2015-08-15 02:32:35 +00:00
AArch64FrameLowering.h Remove redundant TargetFrameLowering::getFrameIndexOffset virtual 2015-08-15 02:32:35 +00:00
AArch64InstrAtomics.td
AArch64InstrFormats.td [MC layer][AArch64] llvm-mc accepts 4-bit immediate values for 2015-10-05 13:42:31 +00:00
AArch64InstrInfo.cpp [Machine Combiner] Refactor machine reassociation code to be target-independent. 2015-09-21 15:09:11 +00:00
AArch64InstrInfo.h MIR Serialization: Serialize the operand's bit mask target flags. 2015-08-18 22:52:15 +00:00
AArch64InstrInfo.td [MC layer][AArch64] llvm-mc accepts 4-bit immediate values for 2015-10-05 13:42:31 +00:00
AArch64ISelDAGToDAG.cpp Make a bunch of static arrays const. 2015-10-18 05:15:34 +00:00
AArch64ISelLowering.cpp Change makeLibCall to take an ArrayRef<SDValue> instead of pointer and size. This removes the need to pass a hardcoded size in many places. NFC 2015-10-22 17:05:00 +00:00
AArch64ISelLowering.h Revert "[safestack] Fast access to the unsafe stack pointer on AArch64/Android." 2015-10-15 21:26:49 +00:00
AArch64LoadStoreOptimizer.cpp Revert "[AArch64]Merge halfword loads into a 32-bit load" 2015-10-23 10:41:38 +00:00
AArch64MachineFunctionInfo.h
AArch64MCInstLower.cpp
AArch64MCInstLower.h
AArch64PBQPRegAlloc.cpp
AArch64PBQPRegAlloc.h
AArch64PerfectShuffle.h
AArch64PromoteConstant.cpp AArch64: Remove implicit ilist iterator conversions, NFC 2015-10-13 20:02:15 +00:00
AArch64RegisterInfo.cpp
AArch64RegisterInfo.h
AArch64RegisterInfo.td
AArch64SchedA53.td
AArch64SchedA57.td
AArch64SchedA57WriteRes.td
AArch64SchedCyclone.td
AArch64Schedule.td
AArch64SelectionDAGInfo.cpp
AArch64SelectionDAGInfo.h
AArch64StorePairSuppress.cpp
AArch64Subtarget.cpp AArch64: Disable the latency heuristic 2015-10-22 18:07:38 +00:00
AArch64Subtarget.h Add Triple::isAndroid(). 2015-10-08 21:21:24 +00:00
AArch64TargetMachine.cpp constify the Function parameter to the TTI creation callback and 2015-09-16 23:38:13 +00:00
AArch64TargetMachine.h
AArch64TargetObjectFile.cpp
AArch64TargetObjectFile.h
AArch64TargetTransformInfo.cpp [CostModel][AArch64] Remove amortization factor for some of the vector select instructions 2015-09-09 15:35:02 +00:00
AArch64TargetTransformInfo.h constify the Function parameter to the TTI creation callback and 2015-09-16 23:38:13 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile