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https://github.com/RPCS3/llvm-mirror.git
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157 lines
4.7 KiB
C++
157 lines
4.7 KiB
C++
//===----------------------------------------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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// Automatically generated file, do not edit!
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPTIMINGCLASSES_H
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#define LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPTIMINGCLASSES_H
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#include "HexagonInstrInfo.h"
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namespace llvm {
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inline bool is_TC1(unsigned SchedClass) {
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switch (SchedClass) {
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case Hexagon::Sched::tc_112d30d6:
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case Hexagon::Sched::tc_151bf368:
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case Hexagon::Sched::tc_1c2c7a4a:
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case Hexagon::Sched::tc_1d41f8b7:
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case Hexagon::Sched::tc_23708a21:
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case Hexagon::Sched::tc_24f426ab:
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case Hexagon::Sched::tc_2f573607:
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case Hexagon::Sched::tc_388f9897:
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case Hexagon::Sched::tc_3d14a17b:
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case Hexagon::Sched::tc_3fbf1042:
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case Hexagon::Sched::tc_407e96f9:
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case Hexagon::Sched::tc_42ff66ba:
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case Hexagon::Sched::tc_4a55d03c:
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case Hexagon::Sched::tc_5502c366:
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case Hexagon::Sched::tc_55b33fda:
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case Hexagon::Sched::tc_56a124a7:
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case Hexagon::Sched::tc_57a55b54:
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case Hexagon::Sched::tc_59a7822c:
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case Hexagon::Sched::tc_5b347363:
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case Hexagon::Sched::tc_5da50c4b:
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case Hexagon::Sched::tc_60e324ff:
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case Hexagon::Sched::tc_651cbe02:
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case Hexagon::Sched::tc_6fc5dbea:
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case Hexagon::Sched::tc_711c805f:
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case Hexagon::Sched::tc_713b66bf:
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case Hexagon::Sched::tc_9124c04f:
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case Hexagon::Sched::tc_9c52f549:
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case Hexagon::Sched::tc_9e27f2f9:
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case Hexagon::Sched::tc_9f6cd987:
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case Hexagon::Sched::tc_a1297125:
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case Hexagon::Sched::tc_a7a13fac:
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case Hexagon::Sched::tc_b837298f:
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case Hexagon::Sched::tc_c57d9f39:
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case Hexagon::Sched::tc_d33e5eee:
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case Hexagon::Sched::tc_decdde8a:
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case Hexagon::Sched::tc_ed03645c:
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case Hexagon::Sched::tc_eeda4109:
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case Hexagon::Sched::tc_ef921005:
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case Hexagon::Sched::tc_f999c66e:
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return true;
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default:
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return false;
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}
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}
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inline bool is_TC2(unsigned SchedClass) {
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switch (SchedClass) {
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case Hexagon::Sched::tc_01d44cb2:
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case Hexagon::Sched::tc_0dfac0a7:
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case Hexagon::Sched::tc_1fcb8495:
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case Hexagon::Sched::tc_20131976:
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case Hexagon::Sched::tc_2c13e7f5:
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case Hexagon::Sched::tc_3edca78f:
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case Hexagon::Sched::tc_5e4cf0e8:
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case Hexagon::Sched::tc_65279839:
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case Hexagon::Sched::tc_7401744f:
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case Hexagon::Sched::tc_84a7500d:
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case Hexagon::Sched::tc_8a825db2:
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case Hexagon::Sched::tc_8b5bd4f5:
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case Hexagon::Sched::tc_95a33176:
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case Hexagon::Sched::tc_9b3c0462:
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case Hexagon::Sched::tc_a08b630b:
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case Hexagon::Sched::tc_a4e22bbd:
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case Hexagon::Sched::tc_a7bdb22c:
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case Hexagon::Sched::tc_bb831a7c:
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case Hexagon::Sched::tc_c20701f0:
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case Hexagon::Sched::tc_d3632d88:
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case Hexagon::Sched::tc_d61dfdc3:
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case Hexagon::Sched::tc_e3d699e3:
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case Hexagon::Sched::tc_f098b237:
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case Hexagon::Sched::tc_f34c1c21:
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return true;
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default:
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return false;
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}
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}
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inline bool is_TC3x(unsigned SchedClass) {
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switch (SchedClass) {
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case Hexagon::Sched::tc_01e1be3b:
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case Hexagon::Sched::tc_1248597c:
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case Hexagon::Sched::tc_197dce51:
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case Hexagon::Sched::tc_28e55c6f:
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case Hexagon::Sched::tc_2c3e17fc:
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case Hexagon::Sched::tc_38382228:
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case Hexagon::Sched::tc_38e0bae9:
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case Hexagon::Sched::tc_4abdbdc6:
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case Hexagon::Sched::tc_503ce0f3:
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case Hexagon::Sched::tc_556f6577:
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case Hexagon::Sched::tc_5a4b5e58:
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case Hexagon::Sched::tc_6ae3426b:
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case Hexagon::Sched::tc_6d861a95:
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case Hexagon::Sched::tc_788b1d09:
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case Hexagon::Sched::tc_7f8ae742:
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case Hexagon::Sched::tc_9406230a:
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case Hexagon::Sched::tc_a154b476:
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case Hexagon::Sched::tc_a38c45dc:
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case Hexagon::Sched::tc_c21d7447:
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case Hexagon::Sched::tc_d7718fbe:
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case Hexagon::Sched::tc_db596beb:
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case Hexagon::Sched::tc_f0cdeccf:
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case Hexagon::Sched::tc_fae9dfa5:
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return true;
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default:
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return false;
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}
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}
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inline bool is_TC2early(unsigned SchedClass) {
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switch (SchedClass) {
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case Hexagon::Sched::tc_45f9d1be:
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case Hexagon::Sched::tc_a4ee89db:
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return true;
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default:
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return false;
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}
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}
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inline bool is_TC4x(unsigned SchedClass) {
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switch (SchedClass) {
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case Hexagon::Sched::tc_02fe1c65:
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case Hexagon::Sched::tc_0a195f2c:
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case Hexagon::Sched::tc_7f7f45f5:
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case Hexagon::Sched::tc_9783714b:
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case Hexagon::Sched::tc_9e72dc89:
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case Hexagon::Sched::tc_9edb7c77:
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case Hexagon::Sched::tc_f0e8e832:
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case Hexagon::Sched::tc_f7569068:
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return true;
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default:
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return false;
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}
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}
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} // namespace llvm
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#endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPTIMINGCLASSES_H
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