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1bb3751439
This does not schedule any passes besides the ones necessary to construct and print the machine function. This is useful to test .mir file reading and printing. Differential Revision: http://reviews.llvm.org/D22432 llvm-svn: 275664
63 lines
1.2 KiB
YAML
63 lines
1.2 KiB
YAML
# RUN: llc -march=x86-64 -run-pass none -o - %s | FileCheck %s
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# This test ensures that the MIR parser parses basic block liveins correctly.
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--- |
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define i32 @test(i32 %a, i32 %b) {
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body:
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%c = add i32 %a, %b
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ret i32 %c
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}
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define i32 @test2(i32 %a, i32 %b) {
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body:
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%c = add i32 %a, %b
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ret i32 %c
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}
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define i32 @test3() {
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body:
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ret i32 0
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}
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...
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---
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name: test
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body: |
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; CHECK-LABEL: bb.0.body:
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; CHECK-NEXT: liveins: %edi, %esi
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bb.0.body:
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liveins: %edi, %esi
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%eax = LEA64_32r killed %rdi, 1, killed %rsi, 0, _
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RETQ %eax
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...
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---
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name: test2
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body: |
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; CHECK-LABEL: name: test2
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; Verify that we can have multiple lists of liveins that will be merged into
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; one.
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; CHECK: bb.0.body:
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; CHECK-NEXT: liveins: %edi, %esi
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bb.0.body:
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liveins: %edi
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liveins: %esi
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%eax = LEA64_32r killed %rdi, 1, killed %rsi, 0, _
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RETQ %eax
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...
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---
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name: test3
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body: |
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; Verify that we can have an empty list of liveins.
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; CHECK-LABEL: name: test3
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; CHECK: bb.0.body:
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; CHECK-NEXT: %eax = MOV32r0 implicit-def dead %eflags
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bb.0.body:
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liveins:
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%eax = MOV32r0 implicit-def dead %eflags
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RETQ killed %eax
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...
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