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llvm-mirror/include/llvm/Target
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Tim Northover 2f13163a84 ARM64: initial backend import 
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

llvm-svn: 205090
2014-03-29 10:18:08 +00:00
..
CostTable.h Add a overload to CostTable which allows it to infer the size of the table. 2013-08-09 19:33:32 +00:00
Target.td [TableGen] Optionally forbid overlap between named and positional operands 2014-03-13 07:57:54 +00:00
TargetCallingConv.h Replace '#include ValueTypes.h' with forward declarations. 2014-03-12 08:00:24 +00:00
TargetCallingConv.td LLVM-1163: AAPCS-VFP violation when CPRC allocated to stack 2014-02-07 11:19:53 +00:00
TargetFrameLowering.h [SystemZ] Clean up register scavenging code 2013-07-05 12:55:00 +00:00
TargetInstrInfo.h Added a size field to the stack map record to handle subregister spills. 2013-11-17 01:36:23 +00:00
TargetIntrinsicInfo.h
TargetItinerary.td
TargetJITInfo.h
TargetLibraryInfo.h SimplifyLibCalls: Push TLI through the exp2->ldexp transform. 2014-02-04 20:27:23 +00:00
TargetLowering.h CodeGenPrep: wrangle IR to exploit AArch64 tbz/tbnz inst. 2014-03-29 08:22:29 +00:00
TargetLoweringObjectFile.h Remove shouldEmitUsedDirectiveFor. 2014-03-06 22:47:08 +00:00
TargetMachine.h [C++11] Add 'override' keyword to virtual methods that override their base class. 2014-03-05 09:10:37 +00:00
TargetOpcodes.h Replace PROLOG_LABEL with a new CFI_INSTRUCTION. 2014-03-07 06:08:31 +00:00
TargetOptions.h DebugInfo: TargetOptions/MCAsmInfo support for compressed debug info sections 2014-03-27 20:45:41 +00:00
TargetRegisterInfo.h Provide a target override for the cost of using a callee-saved register 2014-03-27 23:10:04 +00:00
TargetSchedule.td Machine model comments. Explain a ProcessorUnit's BufferSize. 2013-12-05 17:55:53 +00:00
TargetSelectionDAG.td ARM64: initial backend import 2014-03-29 10:18:08 +00:00
TargetSelectionDAGInfo.h Rename some member variables from TD to DL. 2014-02-18 15:33:12 +00:00
TargetSubtargetInfo.h Added temp flag -misched-bench for staging in default changes. 2013-09-26 05:53:35 +00:00