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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 10:42:39 +01:00
llvm-mirror/lib/Target/Hexagon
Christopher Tetreault 7f0438624e [SVE] Add new VectorType subclasses
Summary:
Introduce new types for fixed width and scalable vectors.

Does not remove getNumElements yet so as to not break code during transition
period.

Reviewers: deadalnix, efriedma, sdesmalen, craig.topper, huntergr

Reviewed By: sdesmalen

Subscribers: jholewinski, arsenm, jvesely, nhaehnle, mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst, nicolasvasilache, csigg, arpith-jacob, mgester, lucyrfox, liufengdb, kerbowa, Joonsoo, grosul1, frgossen, lldb-commits, tschuett, hiraditya, rkruppe, psnobl, llvm-commits

Tags: #llvm, #lldb

Differential Revision: https://reviews.llvm.org/D77587
2020-04-22 08:59:01 -07:00
..
AsmParser
Disassembler
MCTargetDesc [MC][Bugfix] Remove redundant parameter for relaxInstruction 2020-04-21 11:06:55 +08:00
TargetInfo
BitTracker.cpp
BitTracker.h
CMakeLists.txt Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00
Hexagon.h
Hexagon.td [TableGen] Support combining AssemblerPredicates with ORs 2020-03-13 17:13:51 +00:00
HexagonArch.h
HexagonAsmPrinter.cpp
HexagonAsmPrinter.h
HexagonBitSimplify.cpp
HexagonBitTracker.cpp [Alignment][NFC] Transition to MachineFrameInfo::getObjectAlign() 2020-04-01 14:08:28 +00:00
HexagonBitTracker.h
HexagonBlockRanges.cpp
HexagonBlockRanges.h
HexagonBranchRelaxation.cpp
HexagonCallingConv.td
HexagonCFGOptimizer.cpp
HexagonCommonGEP.cpp Remove SequentialType from the type heirarchy. 2020-04-06 17:03:49 -07:00
HexagonConstExtenders.cpp
HexagonConstPropagation.cpp
HexagonCopyToCombine.cpp
HexagonDepArch.h
HexagonDepArch.td [TableGen] Support combining AssemblerPredicates with ORs 2020-03-13 17:13:51 +00:00
HexagonDepDecoders.inc
HexagonDepIICHVX.td
HexagonDepIICScalar.td
HexagonDepInstrFormats.td
HexagonDepInstrInfo.td
HexagonDepITypes.h
HexagonDepITypes.td
HexagonDepMapAsm2Intrin.td [Hexagon] Map dcfetch intrinsic to Y2_dcfetchbo, not Y2_dcfetch 2020-02-28 14:19:20 -06:00
HexagonDepMappings.td
HexagonDepMask.h
HexagonDepOperands.td
HexagonDepTimingClasses.h
HexagonEarlyIfConv.cpp
HexagonExpandCondsets.cpp
HexagonFixupHwLoops.cpp
HexagonFrameLowering.cpp CodeGen: Use Register in TargetFrameLowering 2020-04-07 17:07:44 -04:00
HexagonFrameLowering.h CodeGen: Use Register in TargetFrameLowering 2020-04-07 17:07:44 -04:00
HexagonGenExtract.cpp
HexagonGenInsert.cpp
HexagonGenMux.cpp
HexagonGenPredicate.cpp
HexagonHardwareLoops.cpp CodeGen: Convert some TII hooks to use Register 2020-04-03 14:52:54 -04:00
HexagonHazardRecognizer.cpp
HexagonHazardRecognizer.h
HexagonIICHVX.td
HexagonIICScalar.td
HexagonInstrFormats.td
HexagonInstrFormatsV60.td
HexagonInstrFormatsV65.td
HexagonInstrInfo.cpp CodeGen: Convert some TII hooks to use Register 2020-04-03 14:52:54 -04:00
HexagonInstrInfo.h CodeGen: Convert some TII hooks to use Register 2020-04-03 14:52:54 -04:00
HexagonIntrinsics.td [Hexagon] Map dcfetch intrinsic to Y2_dcfetchbo, not Y2_dcfetch 2020-02-28 14:19:20 -06:00
HexagonIntrinsicsV5.td
HexagonIntrinsicsV60.td
HexagonISelDAGToDAG.cpp [Alignment][NFC] Deprecate getMaxAlignment 2020-03-18 14:48:45 +01:00
HexagonISelDAGToDAG.h
HexagonISelDAGToDAGHVX.cpp
HexagonISelLowering.cpp [CallSite removal][TargetLowering] Replace ImmutableCallSite with CallBase 2020-04-13 13:50:15 -07:00
HexagonISelLowering.h CodeGen: Use Register in TargetLowering 2020-04-08 12:10:58 -04:00
HexagonISelLoweringHVX.cpp [Hexagon] Only allow single HVX vector loads/stores in lowering 2020-03-14 14:26:01 -05:00
HexagonLoopIdiomRecognition.cpp
HexagonMachineFunctionInfo.cpp
HexagonMachineFunctionInfo.h
HexagonMachineScheduler.cpp
HexagonMachineScheduler.h
HexagonMapAsm2IntrinV62.gen.td
HexagonMapAsm2IntrinV65.gen.td
HexagonMCInstLower.cpp
HexagonNewValueJump.cpp
HexagonOperands.td
HexagonOptAddrMode.cpp Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00
HexagonOptimizeSZextends.cpp
HexagonPatterns.td [Hexagon] Fix fshl/fshr -> combine() bug identified in D75114 2020-03-06 17:23:10 +00:00
HexagonPatternsHVX.td
HexagonPatternsV65.td
HexagonPeephole.cpp
HexagonPseudo.td
HexagonRDFOpt.cpp Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00
HexagonRegisterInfo.cpp CodeGen: Use Register in TargetFrameLowering 2020-04-07 17:07:44 -04:00
HexagonRegisterInfo.h
HexagonRegisterInfo.td
HexagonSchedule.td
HexagonScheduleV5.td
HexagonScheduleV55.td
HexagonScheduleV60.td
HexagonScheduleV62.td
HexagonScheduleV65.td
HexagonScheduleV66.td
HexagonScheduleV67.td
HexagonScheduleV67T.td
HexagonSelectionDAGInfo.cpp
HexagonSelectionDAGInfo.h
HexagonSplitConst32AndConst64.cpp
HexagonSplitDouble.cpp CodeGen: Convert some TII hooks to use Register 2020-04-03 14:52:54 -04:00
HexagonStoreWidening.cpp [Alignment][NFC] Use Align version of getMachineMemOperand 2020-03-30 15:46:27 +00:00
HexagonSubtarget.cpp Provide operand indices to adjustSchedDependency 2020-04-17 11:08:44 +01:00
HexagonSubtarget.h Provide operand indices to adjustSchedDependency 2020-04-17 11:08:44 +01:00
HexagonTargetMachine.cpp
HexagonTargetMachine.h
HexagonTargetObjectFile.cpp [SVE] Add new VectorType subclasses 2020-04-22 08:59:01 -07:00
HexagonTargetObjectFile.h
HexagonTargetStreamer.h
HexagonTargetTransformInfo.cpp [SVE] Remove calls to getBitWidth from Hexagon 2020-04-14 11:09:49 -07:00
HexagonTargetTransformInfo.h [TTI][ARM][MVE] Refine gather/scatter cost model 2020-03-11 10:23:41 +00:00
HexagonVectorLoopCarriedReuse.cpp
HexagonVectorPrint.cpp
HexagonVExtract.cpp
HexagonVLIWPacketizer.cpp
HexagonVLIWPacketizer.h
LLVMBuild.txt
RDFCopy.cpp Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00
RDFCopy.h Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00
RDFDeadCode.cpp Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00
RDFDeadCode.h Move RDF from Hexagon to Codegen 2020-03-17 12:43:14 -07:00