mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-20 11:33:24 +02:00
7f4928846c
The existing code would unnecessarily break LDRD/STRD apart with non-adjacent registers, on thumb2 this is not necessary. Ideally on thumb2 we shouldn't match for ldrd/strd pre-regalloc anymore as there is not reason to set register hints anymore, changing that is something for a future patch however. Differential Revision: http://reviews.llvm.org/D9694 llvm-svn: 238795 |
||
---|---|---|
.. | ||
AArch64 | ||
ARM | ||
BPF | ||
CPP | ||
Generic | ||
Hexagon | ||
Inputs | ||
Mips | ||
MIR | ||
MSP430 | ||
NVPTX | ||
PowerPC | ||
R600 | ||
SPARC | ||
SystemZ | ||
Thumb | ||
Thumb2 | ||
WinEH | ||
X86 | ||
XCore |